nonglobal.v

来自「openaccess与verilog互相转化时所用的源代码」· Verilog 代码 · 共 15 行

// This test verifies that the reader will catch out-of-module references to 
// non-global nets.



module child();
    wire a;
endmodule



module top();
    wire x = child.a;
endmodule