traffic.vhd

个人硬件课程设计

library ieee;
use ieee.std_logic_1164.all;

entity traffic is
    port (
 clkin : in std_logic;
 clrn: in std_logic;
 hg: out std_logic; 
 hy: out std_logic; 
 hr: out std_logic; 
 vg: out std_logic; 
 vy: out std_logic; 
 vr: out std_logic );
 end  traffic;
architecture traffic of  traffic is
type light_states is (HGVR,
                      HYVR,
                      VGHR,
                      VYHR);
signal qs_lights:std_logic_vector(5 downto 0);
signal current_state:light_states;
signal next_state:light_states;

begin 
  process (clkin ,current_state,clrn)
 begin 
  if (clrn='0')then 
     next_state<=current_state;
elsif (clkin'event and clkin='1')then
     current_state<=next_state;
     case current_state is
       when HGVR=>qs_lights<="100001";
                    next_state<=HYVR;
       when HYVR=>qs_lights<="010001";
                    next_state<=VGHR;
       when VGHR=>qs_lights<="001100";
                    next_state<=VYHR;
       when VYHR=>qs_lights<="001010";
                    next_state<=HGVR;
       when others=>qs_lights<="000000";
                    next_state<=HGVR;

  end case;
 end if ;
end process;


hg<=qs_lights(5);
hy<=qs_lights(4);
hr<=qs_lights(3);
vg<=qs_lights(2);
vy<=qs_lights(1);
vr<=qs_lights(0);

end traffic;