compile_all.v

本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.

`include "command.v"
`include "sdr_sdram.v"
`include "control_interface.v"
`include "sdr_sdram_tb.v"
`include "mt48lc8m16a2.v"
`include "sdr_data_path.v"
`include "pll1.v"
`include "altclklock.v"