buffer_display.map.eqn

buffer_display是4X4KEYPAD的输出显示模块。可以显示6个连续的按键

--p_state[0] is p_state[0]
--operation mode is normal

p_state[0]_lut_out = A1L76;
p_state[0] = DFFE(p_state[0]_lut_out, clk, reset, , );


--p_state[1] is p_state[1]
--operation mode is normal

p_state[1]_lut_out = !RE;
p_state[1] = DFFE(p_state[1]_lut_out, clk, reset, , start$latch$en_or);


--p_state[2] is p_state[2]
--operation mode is normal

p_state[2]_lut_out = A1L86 # p_state[0] & p_state[1] & RE;
p_state[2] = DFFE(p_state[2]_lut_out, clk, reset, , );


--A1L81 is comb~321
--operation mode is normal

A1L81 = p_state[0] & p_state[1] & !p_state[2] & !RE;


--A1L91 is comb~322
--operation mode is normal

A1L91 = p_state[2] & p_state[0] & !p_state[1];


--A1L02 is comb~323
--operation mode is normal

A1L02 = A1L51 & (A1L91 # A1L81 & din10[3]) # !A1L51 & A1L81 & din10[3];


--A1L12 is comb~324
--operation mode is normal

A1L12 = p_state[1] & p_state[0] & !p_state[2] & !RE # !p_state[1] & (p_state[0] $ !p_state[2]);


--A1L46 is dout10[3]$latch~133
--operation mode is normal

A1L46 = A1L02 & (A1L46 # A1L12) # !A1L02 & A1L46 & !A1L12;


--A1L22 is comb~325
--operation mode is normal

A1L22 = A1L91 & (A1L31 # A1L81 & din10[2]) # !A1L91 & A1L81 & din10[2];


--A1L16 is dout10[2]$latch~133
--operation mode is normal

A1L16 = A1L22 & (A1L16 # A1L12) # !A1L22 & A1L16 & !A1L12;


--A1L32 is comb~326
--operation mode is normal

A1L32 = A1L91 & (A1L11 # A1L81 & din10[1]) # !A1L91 & A1L81 & din10[1];


--A1L85 is dout10[1]$latch~133
--operation mode is normal

A1L85 = A1L32 & (A1L85 # A1L12) # !A1L32 & A1L85 & !A1L12;


--A1L42 is comb~327
--operation mode is normal

A1L42 = A1L91 & (A1L9 # A1L81 & din10[0]) # !A1L91 & A1L81 & din10[0];


--A1L55 is dout10[0]$latch~133
--operation mode is normal

A1L55 = A1L42 & (A1L55 # A1L12) # !A1L42 & A1L55 & !A1L12;


--A1L52 is comb~328
--operation mode is normal

A1L52 = A1L91 & (A1L7 # A1L81 & din1[3]) # !A1L91 & A1L81 & din1[3];


--A1L15 is dout1[3]$latch~133
--operation mode is normal

A1L15 = A1L52 & (A1L15 # A1L12) # !A1L52 & A1L15 & !A1L12;


--A1L62 is comb~329
--operation mode is normal

A1L62 = A1L91 & (A1L5 # A1L81 & din1[2]) # !A1L91 & A1L81 & din1[2];


--A1L84 is dout1[2]$latch~133
--operation mode is normal

A1L84 = A1L62 & (A1L84 # A1L12) # !A1L62 & A1L84 & !A1L12;


--A1L72 is comb~330
--operation mode is normal

A1L72 = A1L91 & (A1L3 # A1L81 & din1[1]) # !A1L91 & A1L81 & din1[1];


--A1L54 is dout1[1]$latch~133
--operation mode is normal

A1L54 = A1L72 & (A1L54 # A1L12) # !A1L72 & A1L54 & !A1L12;


--A1L82 is comb~331
--operation mode is normal

A1L82 = A1L91 & (A1L1 # A1L81 & din1[0]) # !A1L91 & A1L81 & din1[0];


--A1L24 is dout1[0]$latch~133
--operation mode is normal

A1L24 = A1L82 & (A1L24 # A1L12) # !A1L82 & A1L24 & !A1L12;


--A1L77 is start$latch~75
--operation mode is normal

A1L77 = A1L77 & (p_state[2] # p_state[0] $ p_state[1]) # !A1L77 & p_state[2] & p_state[0] & !p_state[1];


--A1L51 is \comb:store10[3]~73
--operation mode is normal

A1L51 = din10[3] & (A1L51 # A1L81) # !din10[3] & A1L51 & !A1L81;


--start$latch$en_or is start$latch$en_or
--operation mode is normal

start$latch$en_or = !p_state[2] & (p_state[0] $ !p_state[1]);


--A1L86 is n_state[2]~307
--operation mode is normal

A1L86 = p_state[2] & (p_state[1] # !done # !p_state[0]);


--A1L31 is \comb:store10[2]~73
--operation mode is normal

A1L31 = din10[2] & (A1L31 # A1L81) # !din10[2] & A1L31 & !A1L81;


--A1L11 is \comb:store10[1]~73
--operation mode is normal

A1L11 = din10[1] & (A1L11 # A1L81) # !din10[1] & A1L11 & !A1L81;


--A1L9 is \comb:store10[0]~73
--operation mode is normal

A1L9 = din10[0] & (A1L9 # A1L81) # !din10[0] & A1L9 & !A1L81;


--A1L7 is \comb:store1[3]~73
--operation mode is normal

A1L7 = din1[3] & (A1L7 # A1L81) # !din1[3] & A1L7 & !A1L81;


--A1L5 is \comb:store1[2]~73
--operation mode is normal

A1L5 = din1[2] & (A1L5 # A1L81) # !din1[2] & A1L5 & !A1L81;


--A1L3 is \comb:store1[1]~73
--operation mode is normal

A1L3 = din1[1] & (A1L3 # A1L81) # !din1[1] & A1L3 & !A1L81;


--A1L1 is \comb:store1[0]~73
--operation mode is normal

A1L1 = din1[0] & (A1L1 # A1L81) # !din1[0] & A1L1 & !A1L81;


--A1L66 is n_state[0]~311
--operation mode is normal

A1L66 = p_state[0] # !RE & !p_state[2] & !p_state[1];


--A1L76 is n_state[0]~313
--operation mode is normal

A1L76 = (p_state[1] # !done # !p_state[0] # !p_state[2]) & CASCADE(A1L66);


--RE is RE
--operation mode is input

RE = INPUT();


--din10[3] is din10[3]
--operation mode is input

din10[3] = INPUT();


--din10[2] is din10[2]
--operation mode is input

din10[2] = INPUT();


--din10[1] is din10[1]
--operation mode is input

din10[1] = INPUT();


--din10[0] is din10[0]
--operation mode is input

din10[0] = INPUT();


--din1[3] is din1[3]
--operation mode is input

din1[3] = INPUT();


--din1[2] is din1[2]
--operation mode is input

din1[2] = INPUT();


--din1[1] is din1[1]
--operation mode is input

din1[1] = INPUT();


--din1[0] is din1[0]
--operation mode is input

din1[0] = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--reset is reset
--operation mode is input

reset = INPUT();


--done is done
--operation mode is input

done = INPUT();


--dout10[3] is dout10[3]
--operation mode is output

dout10[3] = OUTPUT(A1L46);


--dout10[2] is dout10[2]
--operation mode is output

dout10[2] = OUTPUT(A1L16);


--dout10[1] is dout10[1]
--operation mode is output

dout10[1] = OUTPUT(A1L85);


--dout10[0] is dout10[0]
--operation mode is output

dout10[0] = OUTPUT(A1L55);


--dout1[3] is dout1[3]
--operation mode is output

dout1[3] = OUTPUT(A1L15);


--dout1[2] is dout1[2]
--operation mode is output

dout1[2] = OUTPUT(A1L84);


--dout1[1] is dout1[1]
--operation mode is output

dout1[1] = OUTPUT(A1L54);


--dout1[0] is dout1[0]
--operation mode is output

dout1[0] = OUTPUT(A1L24);


--start is start
--operation mode is output

start = OUTPUT(A1L77);