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📄 conv_coder_gen.asm

📁 ADSP BLACKFIN561上实现卷积编码
💻 ASM
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/*******************************************************************************
Copyright(c) 2000 - 2002 Analog Devices. All Rights Reserved.
Developed by Joint Development Software Application Team, IPDC, Bangalore, India
for Blackfin DSPs  ( Micro Signal Architecture 1.0 specification).
    By using this module you agree to the terms of the Analog Devices License
Agreement for DSP Software. 
********************************************************************************
Module name     : conv_coder_gen.asm
Label name      : __conv_coder_gen
Version         : 1.3
Change History  :

                Version     Date        Author          Comments
                1.3         11/18/2002  Swarnalatha     Tested with VDSP++ 3.0
                                                        compiler 6.2.2 on 
                                                        ADSP-21535 Rev.0.2
                1.2         11/13/2002  Swarnalatha     Tested with VDSP++ 3.0
                                                        on ADSP-21535 Rev. 0.2        
                1.1         01/22/2002  Swarnalatha     Modified to match
                                                        silicon cycle count
                1.0         02/14/2001  Swarnalatha     Original

Description     : This function performs convolution coding.
                  The function produces the coded output for a given input
                  message data. The result is stored in the output buffer. The
                  parameters passed should be in the order Cmn,d,m,k,o,a.

                  Cmn = Pointer to the coefficients of the generator polynomials
                  d   = Pointer to the message data which has to be encoded
                  m   = length of the encoder (Number of stages in the shift 
                        register)
                  k   = number of generator polynomials** 
                  o   = Start address of the output of the encoder
                  a   = number of bits in the message data.

Assumptions     : The number of bits in the message data should be a multiple 
                  of 16 bits.

Implementation : The coded bits for each message bit are generated by 
                 c1 = D1 EXOR D2 EXOR D3..........
                 Where D1,D2 and D3 are the states of the shift register.
                 The combination of D1,D2...is determined by the coefficients of
                 the generator polynomial. Similarly c2,c3,....ck are generated
                 using given coefficients of the other generator polynomials.
                 So for each message bit the coded bits which are in number
                 equal to number of generator polynomials are generated.

Prototype       :
                void _conv_coder_gen( 
                        fract16 *,      //Pointer to coefficients of the 
                                        //Generator polynomials 'cmn[]' 
                        fract16 * ,     //Start address of the message data 'd'
                        int ,           // Length Of the encoder 'm'
                        int ,           // Number Of Generator Polynomials 'k'**
                        fract16 *,      //Pointer To The output 'o'
                        int             //Number of bits in the message data 'a'
                        );

                        **--->  Number of Generator Polynomials is equal to the
                                number of output bits encoded for each message
                                bit. In other words if the rate of encoder is
                                1/3 then the number of generator polynomials
                                (k  =  3)

Registers used : A0, A1, R0-R3, R5-R7, I0-I2, B2, M0, M1, L0-L2, P0-P2, LC0,
                 LC1.

Performance    :
                Code size                   : 162 Bytes

                If number of message bits = a
                Number of generator polynomials = k

                Kernel cycle count          : a/16*< 10+ { 16(3+3k) }
                Total Cycle count           : 347 Cycles (for a = 32 and k = 2)
*******************************************************************************/
.section  L1_code;
.global __conv_coder_gen;
.align 8;

__conv_coder_gen:

    [--SP] = (R7:5);        //Push the call save registers
    L0 = 0;
    L1 = 0;
    A1 = A0 = 0 || R7 = [SP+32];
                            //Number of Message bits
    P2 = 16;
    R7 = R7 >> 4 || P0 = [SP+24];
                            //Number of generator polynomials. Number of message
                            //bits/16
    I0 = R1;                //Start Address of the message data
    B2 = R0;                //Start address of the coefficients of the generator
                            //polynomials
    R5 = 1;
    R3 = P0;                //Number of generator polynomials
    R3 =  R3 << 1;
    L2 = R3;                //Length of the circular buffer
    R3+= -2;
    R2+= -1;                //R2 has the length of the encoder
    M1 = R3;
    R0 = R2;
    R2 = A0 || R3 = [SP+28];//Address of output 
    R1.H = A1 || R1.L = W[I0++];
                            //Data which has to be encoded
    I2 = B2;
    R1 = LSHIFT R1 BY R0.L || I2+= M1;
    I1 = R3;                //Address of output
    R3 = 0;
    M0 = -2;
    R6 = A0;

CONV_START:                                   
    R1 = R1 | R2;
    A0 = R1 ; 

    LSETUP(CODESTART,CODEEND)LC0 = P2;
                            //initialize a loop for 16 message bits 
CODESTART:  
        R3 =  R1.H * R3.H || R2.l = W[I2];
                            //fetch the coefficients of the generator polynomial
                            //in R2;
        LSETUP(POLYSTART,POLYEND)LC1 = P0;
                            //Initialize a loop for number of generator
                            //polynomials
POLYSTART:
            R1.l = CC = BXOR (A0,R2) || I2+= M0;
                            //R1 contains the coded bit
            R3 = R3 << 1 || R2.l = W[I2];
POLYEND:
            R3 = R3 | R1;   //coded bit is stored in R3
CODEEND:
        A0 = A0 >> 1 || W[I1++] = R3.l ;  
    R6.L = R6.L + R5.L(NS) || R1.L = W[I0++];  
                            //Store the output in the output buffer
    R1 = LSHIFT R1 BY R0.L;
    R3 = A1, R2 = A0;
    CC = R6 < R7;           //Test for number of 16 bit messages in a frame
    IF CC JUMP CONV_START (BP);
    (R7:5) = [SP++];        //Pop the call save registers
    RTS;
    NOP;                    //to avoid one stall if LINK or UNLINK happens to be
                            //the next instruction after RTS in the memory.
__conv_coder_gen.end:                            

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