📄 e1.h
字号:
typedef struct
{
unsigned char rsbi:2;
unsigned char rsb_ctr:1;
unsigned char bus_frz:1;
unsigned char rsyn_neg:1;
unsigned char rpcm_neg:1;
unsigned char sig_off:1;
unsigned char bus_rsb:1;
}st_rsb_cr;
typedef union
{
unsigned char byte;
st_rsb_cr bit;
}un_rsb_cr;
typedef struct
{
unsigned char tsbi:2;
unsigned char tsb_ctr:1;
unsigned char tsb_align:1;
unsigned char tsyn_neg:1; //输出sync在falling edge时
unsigned char tpcm_neg:1; //在falling edge输出数据
unsigned char tx_align:1; // 使用TMSYNC(transmitter multiframe sync)信号from system bus
unsigned char bus_tsb:1;
}st_tsb_cr;
typedef union
{
unsigned char byte;
st_tsb_cr bit;
}un_tsb_cr;
typedef struct
{
unsigned char thru:1;
unsigned char frz_on:1;
unsigned char frz_off:1;
unsigned char debounce:1;
unsigned char unicode:1;
unsigned char set_sig:1;
unsigned char set_rsig:1;
unsigned char reserved:1;
}st_rsig_cr;
typedef union
{
unsigned char byte;
st_rsig_cr bit;
}un_rsig_cr;
typedef struct
{
unsigned char reserved_0:1;
unsigned char ruslip:1;
unsigned char rfslip:1;
unsigned char rsdir:1;
unsigned char reserved_4:1;
unsigned char tuslip:1;
unsigned char tfslip:1;
unsigned char tsdir:1;
}st_sstat;
typedef union
{
unsigned char byte;
st_sstat bit;
}un_sstat;
typedef struct
{
unsigned char rslip_rd:1;
unsigned char rslip_wr:1;
unsigned char rdelay:6;
}st_rphase;
typedef union
{
unsigned char byte;
st_rphase bit;
}un_rphase;
typedef struct
{
unsigned char tslip_rd:1;
unsigned char tslip_wr:1;
unsigned char tdelay:6;
}st_tphase;
typedef union
{
unsigned char byte;
st_tphase bit;
}un_tphase;
typedef struct
{
unsigned char perr_sbc:1;
unsigned char perr_rpc:1;
unsigned char perr_tpc:1;
unsigned char reserved:5;
}st_perr;
typedef union
{
unsigned char byte;
st_perr bit;
}un_perr;
typedef struct
{
unsigned char assign:1;
unsigned char tsig_ab:1;
unsigned char tindo:1;
unsigned char rindo:1;
unsigned char rloop:1;
unsigned char sig_lp:1;
unsigned char insert:1;
unsigned char reserved:1;
}st_sbc;
typedef union
{
unsigned char byte;
st_sbc bit;
}un_sbc;
typedef struct
{
unsigned char tsigd:1;
unsigned char tsigc:1;
unsigned char tsigb:1;
unsigned char tsiga:1;
unsigned char tlocal:1;
unsigned char tidle:1;
unsigned char tloop:1;
unsigned char tb7zs:1;
}st_tpc;
typedef union
{
unsigned char byte;
st_tpc bit;
}un_tpc;
typedef struct
{
unsigned char rsigd:1;
unsigned char rsigc:1;
unsigned char rsigb:1;
unsigned char rsiga:1;
unsigned char rlocal:1;
unsigned char sig_stk:1;
unsigned char ridle:1;
unsigned char rsig_ab:1;
}st_rpc;
typedef union
{
unsigned char byte;
st_rpc bit;
}un_rpc;
typedef union
{
unsigned char byte;
st_did did; //000
st_cro cr0; //001
st_jat_cr jat_cr; //002
st_irr irr; //003
st_isr7 isr7; //004
st_isr6 isr6; //005
st_isr5 isr5; //006
st_isr4 isr4; //007
st_isr3 isr3; //008
st_isr2 isr2; //009
st_isr1 isr1; //00a
st_isr0 isr0; //00b
st_isr7 ier7; //00c
st_isr6 ier6; //00d
st_isr5 ier5; //00e
st_isr4 ier4; //00f
st_isr3 ier3; //010
st_isr2 ier2; //011
st_isr1 ier1; //012
st_isr0 ier0; //013
st_loop loop; //014
st_dl3_ts dl3_ts; //015
st_fstat fstat; //017
st_pio pio; //018
st_poe poe; //019
st_cmux cmux; //01a
st_tmux tmux; //01b
testc test; //01c
//01d~01f reserved
st_liu_cr liu_cr; //020
st_rstat rstat; //021
st_rliu_cr rliu_cr; //022
st_rcr0 rcr0; //040
st_rpatt rpatt; //041
st_ralm ralm; //045
st_latch latch; //046
st_alm1 alm1; //047
st_alm2 alm2; //048
st_alm3 alm3; //049
st_tliu_cr tliu_cr; //068
st_tcr1 tcr1; //071
st_tfrm tfrm; //072
st_terror terror; //073
st_tman tman; //074
st_talm talm; //075
st_tpatt tpatt; //076
st_tlib tlb; //077
st_clad_cr clad_cr; //090
st_csel csel; //091
st_cphase cphase; //092
st_ctest ctest; //093
st_bop bop; //0a0
st_rbop rbop; //0a2
st_bop_stat bop_stat;//0a3
st_dl_ctl dl1_ctl;//0a6
st_dl_ctl dl2_ctl;//0b1
st_rdl_ffc rdl1_ffc;//0a7
st_rdl_ffc rdl2_ffc;//0b2
st_rdl_stat rdl1_stat;//0a9
st_rdl_stat rdl2_stat;//0b4
st_prm prm; //0aa
st_tdl_stat tdl1_stat; //0ae
st_tdl_stat tdl2_stat; //0b9
st_sbi_cr sbi_cr; //0d0
st_rsb_cr rsb_cr; //0d1
st_tsb_cr tsb_cr; //0d4
st_rsig_cr rsig_cr; //0d7
st_sstat sstat; //0d9
st_rphase rphase; //0db
st_tphase tphase; //0dc
st_perr perr; //0dd
st_sbc sbc; //0e0~0ef
st_tpc tpc; //100~11f
st_rpc rpc; //180~19f
}un_bt8370_reg;
#define bt8370_TS_PER_PORT 32
#define bt8370_SA_BYTES_PER_PORT 5
#define bt8370_DLINKS_PER_PORT 2
typedef struct
{
bt8370_reg did; //00 /device identification 8370是09/
bt8370_reg cr0; //01 /Primary Control register 00/
bt8370_reg jat_cr; //02 /Jitter Attenuator Configuration 00/
bt8370_reg irr; //03 /Interrupt Request register 中断请求寄存器/（read only)
bt8370_reg isr7; //04
bt8370_reg isr6; //05
bt8370_reg isr5; //06 /error interrupt status r/
bt8370_reg isr4; //07
bt8370_reg isr3; //08 /Timer Interrupt Status r/
bt8370_reg isr2; //09
bt8370_reg isr1; //0A
bt8370_reg isr0; //0B
bt8370_reg ier7; //0C
bt8370_reg ier6; //0D
bt8370_reg ier5; //0E
bt8370_reg ier4; //0F
bt8370_reg ier3; //10
bt8370_reg ier2; //11
bt8370_reg ier1; //12
bt8370_reg ier0; //13
bt8370_reg loop; //14
bt8370_reg dl3_ts; //15
bt8370_reg dl3_bit; //16
bt8370_reg fstat; //17
bt8370_reg pio; //18
bt8370_reg poe; //19
bt8370_reg cmux; //1A
bt8370_reg tmux; //1B
bt8370_reg test; //1C
bt8370_reg reserved_1D[3]; //1D,1E,1F
bt8370_reg liu_cr; //20 -> Receive LIU /从20到3c为receive liu/
bt8370_reg rstat; //21 /RLIU的configuration所在/
bt8370_reg rliu_cr; //22
bt8370_reg lpf; //23
bt8370_reg vga_max; //24 /receive sensitivity level由此设定/
/vga(variable gain amplifier) 在固定gain的情况下the RLIU sensitivity的值存在vga_max中/
bt8370_reg eq_dat; //25
bt8370_reg eq_ptr; //26 //add by mark 用于判断eq 预加重的相关系数
bt8370_reg dslice; //27
bt8370_reg eq_out; //28
bt8370_reg vga; //29
bt8370_reg pre_eq; //2A
bt8370_reg reserved_2B[5]; //2B~2F
bt8370_reg coeff[8]; //30~37
bt8370_reg gain[5]; //38~3C
bt8370_reg reserved_3D[3]; //3D~3F
bt8370_reg rcr0; //40 -> Digital Receiver /从40到49为digital receiver/
bt8370_reg rpatt; //41
bt8370_reg rlb; //42
bt8370_reg lba; //43
bt8370_reg lbd; //44
bt8370_reg ralm; //45
bt8370_reg latch; //46
bt8370_reg alm1; //47
bt8370_reg alm2; //48
bt8370_reg alm3; //49
bt8370_reg reserved_4A[6]; //4A~4F
bt8370_reg ferr[2]; //50,51 -> Error/Alarm Counters /50到59是error和alarm部分/
bt8370_reg cerr[2]; //52,53
bt8370_reg lcv[2]; //54,55
bt8370_reg febe[2]; //56,57
bt8370_reg berr[2]; //58,59
bt8370_reg reserved_5A; //5A
bt8370_reg rsa4; //5B -> Receive Sa-Byte
bt8370_reg rsa5; //5C -> Receive Sa-Byte
bt8370_reg rsa6; //5D -> Receive Sa-Byte
bt8370_reg rsa7; //5E -> Receive Sa-Byte
bt8370_reg rsa8; //5F -> Receive Sa-Byte
bt8370_reg shape[8]; //60~67 -> TLIU
bt8370_reg tliu_cr; //68
bt8370_reg reserved_69[7]; //69~6F
bt8370_reg tcr0; //70 -> Digital Transmitter
bt8370_reg tcr1; //71
bt8370_reg tfrm; //72
bt8370_reg terror; //73
bt8370_reg tman; //74
bt8370_reg talm; //75
bt8370_reg tpatt; //76
bt8370_reg tlb; //77
bt8370_reg lbp; //78
bt8370_reg reserved_79[2]; //79,7A
bt8370_reg tsa4; //7B -> Transmit Sa-Byte
bt8370_reg tsa5; //7C -> Transmit Sa-Byte
bt8370_reg tsa6; //7D -> Transmit Sa-Byte
bt8370_reg tsa7; //7E -> Transmit Sa-Byte
bt8370_reg tsa8; //7F -> Transmit Sa-Byte
bt8370_reg reserved_80[16]; //80~8F
bt8370_reg clad_cr; //90 -> CLAD
bt8370_reg csel; //91
bt8370_reg cphase; //92
bt8370_reg ctest; //93
bt8370_reg reserved_94[12]; //94~9F
bt8370_reg bop; //A0 -> BOP
bt8370_reg tbop; //A1
bt8370_reg rbop; //A2
bt8370_reg bop_stat; //A3
bt8370_reg dl1_ts; //A4 -> Data Link
bt8370_reg dl1_bit; //A5 -> Data Link
bt8370_reg dl1_ctl; //A6 -> Data Link
bt8370_reg rdl1_ffc; //A7 -> Data Link
bt8370_reg rdl1; //A8 -> Data Link
bt8370_reg rdl1_stat; //A9 -> Data Link
bt8370_reg prm; //AA -> Data Link
bt8370_reg tdl1_fec; //AB -> Data Link
bt8370_reg tdl1_eom; //AC -> Data Link
bt8370_reg tdl1; //AD -> Data Link
bt8370_reg tdl1_stat; //AE -> Data Link
bt8370_reg dl2_ts; //AF -> Data Link
bt8370_reg dl2_bit; //B0 -> Data Link
bt8370_reg dl2_ctl; //B1 -> Data Link
bt8370_reg rdl2_ffc; //B2 -> Data Link
bt8370_reg rdl2; //B3 -> Data Link
bt8370_reg rdl2_stat; //B4 -> Data Link
bt8370_reg reserved_B5; //B5 -> Data Link
bt8370_reg tdl2_fec; //B6 -> Data Link
bt8370_reg tdl2_eom; //B7 -> Data Link
bt8370_reg tdl2; //B8 -> Data Link
bt8370_reg tdl2_stat; //B9 -> Data Link
bt8370_reg dl_test1; //BA -> Test
bt8370_reg dl_test2; //BB -> Test
bt8370_reg dl_test3; //BC -> Test
bt8370_reg dl_test4; //BD -> Test
bt8370_reg dl_test5; //BE -> Test
bt8370_reg reserved_BF[17]; //BF~CF
bt8370_reg sbi_cr; //D0 -> System Bus Interface
bt8370_reg rsb_cr; //D1
bt8370_reg rsync_bit; //D2
bt8370_reg rsync_ts; //D3
bt8370_reg tsb_cr; //D4
bt8370_reg tsync_bit; //D5
bt8370_reg tsync_ts; //D6
bt8370_reg rsig_cr; //D7
bt8370_reg rsync_frm; //D8
bt8370_reg sstat; //D9
bt8370_reg stack; //DA
bt8370_reg rphase; //DB
bt8370_reg tphase; //DC
bt8370_reg perr; //DD
bt8370_reg reserved_DE[2]; //DE,DF
bt8370_reg sbc[32]; //E0~EF
bt8370_reg tpc[32]; //100~11F
bt8370_reg tsig[32]; //120~13F
bt8370_reg tslip_lo[32];//140~15F
bt8370_reg tslip_hi[32];//160~17F
bt8370_reg rpc[32]; //180~19F
bt8370_reg rsig[32]; //1A0~1BF
bt8370_reg rslip_lo[32];//1C0~1DF
bt8370_reg rslip_hi[32];//1E0~1FF
} st_bt8370;
#define ADDR_BT8370(a) (*(volatile st_bt8370 *)a)
#define bt8370 ADDR_BT8370(0xCFFFFC00)
#define ABT8370 ADDR_ABYTE(0xCFFFFC00)
#define BGET(x) bt.byte = bt8370.x
#define BSET(x) bt8370.x = bt.byte
// define access LED mode
#define LED_ON 0
#define LED_OFF 1
#define LED_XOR 2
#define LED_UNKOWN 100
// define xdragon_prologue step /*prologue 序言*/
#define XDRAGON_STARTUP 0x00
#define XDRAGON_INIT 0x10
#define XDRAGON_PRE_NORMAL 0x20
#define XDRAGON_NORMAL 0x30
#define XDRAGON_DISABLE 0x80
#define XDRAGON_ERROR 0xF0
#define XDRAGON_STOP 0xFF
#define XDRAGON_UNKOWN 0xFFFF
/*coefficents 系数*/
////////////////////////////////////////////////////implement RLIU Long and Short Haul coefficients start/////////////////////
/*Short Haul Software Coefficient Table */
#define SHORT_HAUL_STATE 3
#define LONG_HAUL_STATE 4
static U8 aCoeff_val[22][8] = /*Coefficient Table for Short Haul Twisted Pair T1/E1
120/100 Ω Interface*/
{
{0xf8,0x7a,0x3a,0x7,0x19,0x6,0x10,0xa},/* VGA = 0xc */
{0xf7,0x79,0x39,0x8,0x20,0x5,0xd,0x7},/* VGA = 0xd */
{0xf8,0x79,0x37,0x9,0x1c,0x9,0x13,0x5},/* VGA = 0xe */
{0xef,0x6a,0x59,0x26,0xfc,0x4,0xf6,0xfc},/* VGA = 0xf */
{0xe8,0x7e,0x37,0x17,0xf5,0x9,0xf7,0x1},/* VGA = 0x10 */
{0xe8,0x7e,0x37,0x17,0xf5,0x9,0xf7,0x1},/* VGA = 0x11 */
{0xf0,0x6d,0x3a,0x13,0xfa,0xa,0xf2,0xfe},/* VGA = 0x12 */
{0xf2,0x71,0x37,0x0e,0xfe,0x2,0xf2,0x2},/* VGA = 0x13 */
{0xf0,0x6e,0x34,0xb,0x0,0x3,0xfb,0x3},/* VGA = 0x14 */
{0xef,0x6f,0x33,0xa,0xfc,0x5,0xfc,0x0},/* VGA = 0x15 */
{0xef,0x6e,0x33,0x8,0xfa,0x6,0xf6,0x0},/* VGA = 0x16 */
{0xeb,0x6d,0x34,0xa,0xeb,0x3,0xf0,0x0},/* VGA = 0x17 */
{0xef,0x70,0x34,0x3,0xf2,0x5,0xf3,0xff},/* VGA = 0x18 */
{0xf0,0x7f,0xb,0xa,0xe7,0x7,0x6,0x4},/* VGA = 0x19 */
{0xec,0x7c,0x9,0x8,0xe3,0x5,0x4,0x2},/* VGA = 0x1a */
{0xf0,0x7d,0xc,0x4,0xe6,0x6,0x3,0x1},/* VGA = 0x1b */
{0xed,0x7b,0x9,0x0,0xe8,0x9,0x2,0x3},/* VGA = 0x1c */
{0xef,0x6a,0x1b,0xf9,0xe9,0x6,0xf2,0x2},/* VGA = 0x1d */
{0xed,0x67,0x28,0xf0,0xe7,0x8,0xf0,0xff},/* VGA = 0x1e */
{0xef,0x74,0x11,0xee,0xec,0x5,0xf7,0x1},/* VGA = 0x1f */
{0xef,0x62,0x2a,0xe6,0xef,0x3,0xfa,0x0},/* VGA = 0x20 */
{0xec,0x61,0x30,0xe4,0xe9,0x2,0xf9,0x2},/* VGA = 0x21 */
};
/*Long Haul Coefficients Table*/
static U8 aCoeff_default[6][8] =
{
{0xea,0x7b,0x3f,0x12,0xfc,0x08,0xf8,0x00},
{0xed,0x62,0x37,0xd8,0x12,0xee,0x15,0xfc},
{0xe6,0x6f,0x1d,0xec,0xdb,0x0f,0xef,0x03},
{0xda,0x7a,0x26,0xf2,0xb0,0x22,0xeb,0x04},
{0xd7,0x78,0x2c,0xdb,0xb6,0x1a,0xfe,0x00},
{0xe1,0x65,0x33,0xf7,0xde,0x0a,0xfa,0x00},
};
////////////////////////////////////////////////////implement RLIU Long and Short Haul coefficients end/////////////////////⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -