cpld_bus.map.qmsg

CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 156 11/29/2004 SJ Web Edition " "Info: Version 4.2 Build 156 11/29/2004 SJ Web Edition" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Aug 04 20:04:25 2005 " "Info: Processing started: Thu Aug 04 20:04:25 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off cpld_bus -c cpld_bus " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off cpld_bus -c cpld_bus" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "decode.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file decode.v" { { "Info" "ISGN_ENTITY_NAME" "1 decode " "Info: Found entity 1: decode" {  } { { "decode.v" "" { Text "E:/project/cpld_bus/decode.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpld_bus.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file cpld_bus.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 cpld_bus " "Info: Found entity 1: cpld_bus" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "bus_ISM.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file bus_ISM.v" { { "Info" "ISGN_ENTITY_NAME" "1 bus_ISM " "Info: Found entity 1: bus_ISM" {  } { { "bus_ISM.v" "" { Text "E:/project/cpld_bus/bus_ISM.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "data_out_mux.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file data_out_mux.v" { { "Info" "ISGN_ENTITY_NAME" "1 Data_Out_Mux " "Info: Found entity 1: Data_Out_Mux" {  } { { "data_out_mux.v" "" { Text "E:/project/cpld_bus/data_out_mux.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Output_reg.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Output_reg.v" { { "Info" "ISGN_ENTITY_NAME" "1 Output_reg " "Info: Found entity 1: Output_reg" {  } { { "Output_reg.v" "" { Text "E:/project/cpld_bus/Output_reg.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "STATUS_REG BASE_ADDR+8'b10000000 " "Warning: Can't find a definition for parameter STATUS_REG -- assuming BASE_ADDR+8'b10000000 was intended to be a quoted string" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 624 152 336 720 "inst5" "" } } } }  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "CONTROL_REG BASE_ADDR+8'b10000010 " "Warning: Can't find a definition for parameter CONTROL_REG -- assuming BASE_ADDR+8'b10000010 was intended to be a quoted string" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 624 152 336 720 "inst5" "" } } } }  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "DATAIN_REG BASE_ADDR+8'b10000100 " "Warning: Can't find a definition for parameter DATAIN_REG -- assuming BASE_ADDR+8'b10000100 was intended to be a quoted string" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 624 152 336 720 "inst5" "" } } } }  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "DATAOUT_REG BASE_ADDR+8'b10000110 " "Warning: Can't find a definition for parameter DATAOUT_REG -- assuming BASE_ADDR+8'b10000110 was intended to be a quoted string" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 624 152 336 720 "inst5" "" } } } }  } 0}
{ "Warning" "WGDFX_INCONSISTENT_BASE_NAME" "" "Warning: Found multiple base names" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } { 672 936 1112 688 "data_out\[7..0\]" "" } } } }  } 0}
{ "Warning" "WGDFX_INCONSISTENT_BASE_NAME" "" "Warning: Found multiple base names" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } { 248 688 864 264 "data_out1\[7..0\]" "" } } } }  } 0}
{ "Warning" "WGDFX_INCONSISTENT_BASE_NAME" "" "Warning: Found multiple base names" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } { 368 880 1056 384 "data_out2\[7..0\]" "" } } } }  } 0}
{ "Warning" "WGDFX_INCONSISTENT_BASE_NAME" "" "Warning: Found multiple base names" {  } { { "cpld_bus.bdf" "" { Schematic "E:/project/cpld_bus/cpld_bus.bdf" { { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } { 472 696 872 488 "data_out3\[7..0\]" "" } } } }  } 0}