lightw.map.rpt

一個LCD燈的小程序。不是我寫的。我只負責了調試。適用在ACEXEP1K30QC208-3上。我跑了SIMULATOR

+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in F:/usb backup/lightW/lightW.map.eqn.


+--------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                   ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Name with Absolute Path                                        ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; div.vhd                          ; yes             ; F:/usb backup/lightW/div.vhd                                        ;
; light.vhd                        ; yes             ; F:/usb backup/lightW/light.vhd                                      ;
; lightW.bdf                       ; yes             ; F:/usb backup/lightW/lightW.bdf                                     ;
; divid.vhd                        ; yes             ; F:/usb backup/lightW/divid.vhd                                      ;
; lpm_counter.tdf                  ; yes             ; e:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf         ;
; lpm_constant.inc                 ; yes             ; e:/altera/quartus42/libraries/megafunctions/lpm_constant.inc        ;
; lpm_decode.inc                   ; yes             ; e:/altera/quartus42/libraries/megafunctions/lpm_decode.inc          ;
; lpm_add_sub.inc                  ; yes             ; e:/altera/quartus42/libraries/megafunctions/lpm_add_sub.inc         ;
; cmpconst.inc                     ; yes             ; e:/altera/quartus42/libraries/megafunctions/cmpconst.inc            ;
; lpm_compare.inc                  ; yes             ; e:/altera/quartus42/libraries/megafunctions/lpm_compare.inc         ;
; lpm_counter.inc                  ; yes             ; e:/altera/quartus42/libraries/megafunctions/lpm_counter.inc         ;
; dffeea.inc                       ; yes             ; e:/altera/quartus42/libraries/megafunctions/dffeea.inc              ;
; alt_synch_counter.inc            ; yes             ; e:/altera/quartus42/libraries/megafunctions/alt_synch_counter.inc   ;
; alt_synch_counter_f.inc          ; yes             ; e:/altera/quartus42/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc            ; yes             ; e:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.inc   ;
; alt_counter_stratix.inc          ; yes             ; e:/altera/quartus42/libraries/megafunctions/alt_counter_stratix.inc ;
; aglobal42.inc                    ; yes             ; e:/altera/quartus42/libraries/megafunctions/aglobal42.inc           ;
; alt_counter_f10ke.tdf            ; yes             ; e:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.tdf   ;
; flex10ke_lcell.inc               ; yes             ; e:/altera/quartus42/libraries/megafunctions/flex10ke_lcell.inc      ;
+----------------------------------+-----------------+---------------------------------------------------------------------+


+-----------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary               ;
+-----------------------------------+-----------------------+
; Resource                          ; Usage                 ;
+-----------------------------------+-----------------------+
; Logic cells                       ; 63                    ;
; Total combinational functions     ; 59                    ;
; Total 4-input functions           ; 29                    ;
; Total 3-input functions           ; 6                     ;
; Total 2-input functions           ; 2                     ;
; Total 1-input functions           ; 0                     ;
; Total 0-input functions           ; 22                    ;
; Combinational cells for routing   ; 0                     ;
; Total registers                   ; 35                    ;
; Total logic cells in carry chains ; 22                    ;
; I/O pins                          ; 14                    ;
; Maximum fan-out node              ; div:inst|reduce_nor~0 ;
; Maximum fan-out                   ; 22                    ;
; Total fan-out                     ; 236                   ;
; Average fan-out                   ; 3.06                  ;
+-----------------------------------+-----------------------+


+----------------------------------------------------------------+
; WYSIWYG Cells                                                  ;
+--------------------------------------------------------+-------+
; Statistic                                              ; Value ;
+--------------------------------------------------------+-------+
; Number of WYSIWYG cells                                ; 22    ;
; Number of synthesis-generated cells                    ; 41    ;
; Number of WYSIWYG LUTs                                 ; 22    ;
; Number of synthesis-generated LUTs                     ; 37    ;
; Number of WYSIWYG registers                            ; 22    ;
; Number of synthesis-generated registers                ; 13    ;
; Number of cells with combinational logic only          ; 28    ;
; Number of cells with registers only                    ; 4     ;
; Number of cells with combinational logic and registers ; 31    ;
+--------------------------------------------------------+-------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 35    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 22    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 1     ;
; Number of registers using Output Enable      ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
    Info: Processing started: Tue Sep 06 16:52:45 2005
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off lightW -c lightW
Info: Found 2 design units, including 1 entities, in source file div.vhd
    Info: Found design unit 1: div-alfa
    Info: Found entity 1: div
Info: Found 2 design units, including 1 entities, in source file light.vhd
    Info: Found design unit 1: light-behv
    Info: Found entity 1: light
Info: Found 1 design units, including 1 entities, in source file lightW.bdf
    Info: Found entity 1: lightW
Info: Found 2 design units, including 1 entities, in source file divid.vhd
    Info: Found design unit 1: divid-beta
    Info: Found entity 1: divid
Warning: Port "light" of type light and instance "inst1" is missing source signal
Warning: VHDL Signal Declaration warning at light.vhd(10): ignored default value for signal "banner"
Warning: VHDL Variable Declaration warning at light.vhd(22): ignored initial value expression for variable "flag"
Warning: VHDL Process Statement warning at div.vhd(18): signal "count" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Info: Inferred 1 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=22) from the following logic: "div:inst|count[0]~0"
Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.tdf
    Info: Found entity 1: alt_counter_f10ke
Info: Implemented 77 device resources after synthesis - the final resource count might be different
    Info: Implemented 1 input pins
    Info: Implemented 13 output pins
    Info: Implemented 63 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 4 warnings
    Info: Processing ended: Tue Sep 06 16:52:50 2005
    Info: Elapsed time: 00:00:06