📄 lightw.sim.vwf

📁 一個LCD燈的小程序。不是我寫的。我只負責了調試。適用在ACEXEP1K30QC208-3上。我跑了SIMULATOR
💻 VWF
字号:
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/

/*
Copyright (C) 1991-2004 Altera Corporation
Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
support information,  device programming or simulation file,  and any other
associated  documentation or information  provided by  Altera  or a partner
under  Altera's   Megafunction   Partnership   Program  may  be  used  only
to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
other  use  of such  megafunction  design,  netlist,  support  information,
device programming or simulation file,  or any other  related documentation
or information  is prohibited  for  any  other purpose,  including, but not
limited to  modification,  reverse engineering,  de-compiling, or use  with
any other  silicon devices,  unless such use is  explicitly  licensed under
a separate agreement with  Altera  or a megafunction partner.  Title to the
intellectual property,  including patents,  copyrights,  trademarks,  trade
secrets,  or maskworks,  embodied in any such megafunction design, netlist,
support  information,  device programming or simulation file,  or any other
related documentation or information provided by  Altera  or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.
*/

HEADER
{
	VERSION = 1;
	TIME_UNIT = ns;
	SIMULATION_TIME = 600000.0;
	GRID_PHASE = 0.0;
	GRID_PERIOD = 10.0;
	GRID_DUTY_CYCLE = 50;
}

SIGNAL("dataout0")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("dataout1")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("dataout2")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("dataout3")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("dataout4")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("dataout5")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("dataout6")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("dataout7")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("pin_clk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("testout0")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("testout1")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("testout2")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("testout3")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("testout4")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

TRANSITION_LIST("dataout0")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 74252.5;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 112640.0;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 71680.0;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 51199.0;
		LEVEL 1 FOR 5120.0;
		LEVEL 0 FOR 56320.0;
		LEVEL 1 FOR 5120.0;
		LEVEL 0 FOR 35840.0;
		LEVEL 1 FOR 5120.0;
		LEVEL 0 FOR 87041.0;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 54707.5;
	}
}

TRANSITION_LIST("dataout1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 64012.5;
		LEVEL 1 FOR 30720.0;
		LEVEL 0 FOR 92160.0;
		LEVEL 1 FOR 30720.0;
		LEVEL 0 FOR 51200.0;
		LEVEL 1 FOR 20480.0;
		LEVEL 0 FOR 46079.0;
		LEVEL 1 FOR 15360.0;
		LEVEL 0 FOR 46080.0;
		LEVEL 1 FOR 15360.0;
		LEVEL 0 FOR 25600.0;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 76801.0;
		LEVEL 1 FOR 30720.0;
		LEVEL 0 FOR 44467.5;
	}
}

TRANSITION_LIST("dataout2")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 53772.5;
		LEVEL 1 FOR 51200.0;
		LEVEL 0 FOR 71680.0;
		LEVEL 1 FOR 51200.0;
		LEVEL 0 FOR 30720.0;
		LEVEL 1 FOR 30720.0;
		LEVEL 0 FOR 40959.0;
		LEVEL 1 FOR 25600.0;
		LEVEL 0 FOR 35840.0;
		LEVEL 1 FOR 25600.0;
		LEVEL 0 FOR 15360.0;
		LEVEL 1 FOR 15360.0;
		LEVEL 0 FOR 66561.0;
		LEVEL 1 FOR 51200.0;
		LEVEL 0 FOR 34227.5;
	}
}

TRANSITION_LIST("dataout3")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 43532.0;
		LEVEL 1 FOR 71680.0;
		LEVEL 0 FOR 51200.0;
		LEVEL 1 FOR 71680.0;
		LEVEL 0 FOR 10240.0;
		LEVEL 1 FOR 40960.0;
		LEVEL 0 FOR 35839.0;
		LEVEL 1 FOR 35840.0;
		LEVEL 0 FOR 25600.0;
		LEVEL 1 FOR 35840.0;
		LEVEL 0 FOR 5120.0;
		LEVEL 1 FOR 20480.0;
		LEVEL 0 FOR 56321.0;
		LEVEL 1 FOR 71680.0;
		LEVEL 0 FOR 23988.0;
	}
}

TRANSITION_LIST("dataout4")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33291.9;
		LEVEL 1 FOR 92160.0;
		LEVEL 0 FOR 40960.0;
		LEVEL 1 FOR 71680.0;
		LEVEL 0 FOR 40960.0;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 30719.0;
		LEVEL 1 FOR 46080.0;
		LEVEL 0 FOR 20480.0;
		LEVEL 1 FOR 35840.0;
		LEVEL 0 FOR 20480.0;
		LEVEL 1 FOR 5120.0;
		LEVEL 0 FOR 46081.0;
		LEVEL 1 FOR 92160.0;
		LEVEL 0 FOR 13748.1;
	}
}

TRANSITION_LIST("dataout5")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 23051.8;
		LEVEL 1 FOR 112640.0;
		LEVEL 0 FOR 40960.0;
		LEVEL 1 FOR 51200.0;
		LEVEL 0 FOR 40960.0;
		LEVEL 1 FOR 20480.0;
		LEVEL 0 FOR 25599.0;
		LEVEL 1 FOR 56320.0;
		LEVEL 0 FOR 20480.0;
		LEVEL 1 FOR 25600.0;
		LEVEL 0 FOR 20480.0;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 35841.0;
		LEVEL 1 FOR 112640.0;
		LEVEL 0 FOR 3508.2;
	}
}

TRANSITION_LIST("dataout6")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 12811.8;
		LEVEL 1 FOR 133120.0;
		NODE
		{
			REPEAT = 2;
			LEVEL 0 FOR 40960.0;
			LEVEL 1 FOR 30720.0;
		}
		LEVEL 0 FOR 20479.0;
		LEVEL 1 FOR 66560.0;
		NODE
		{
			REPEAT = 2;
			LEVEL 0 FOR 20480.0;
			LEVEL 1 FOR 15360.0;
		}
		LEVEL 0 FOR 25601.0;
		LEVEL 1 FOR 126388.2;
	}
}

TRANSITION_LIST("dataout7")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 2571.8;
		LEVEL 1 FOR 153600.0;
		LEVEL 0 FOR 40960.0;
		LEVEL 1 FOR 10240.0;
		LEVEL 0 FOR 40960.0;
		LEVEL 1 FOR 40960.0;
		LEVEL 0 FOR 15359.0;
		LEVEL 1 FOR 76800.0;
		LEVEL 0 FOR 20480.0;
		LEVEL 1 FOR 5120.0;
		LEVEL 0 FOR 20480.0;
		LEVEL 1 FOR 20480.0;
		LEVEL 0 FOR 15361.0;
		LEVEL 1 FOR 136628.2;
	}
}

TRANSITION_LIST("pin_clk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 60000;
			LEVEL 0 FOR 5.0;
			LEVEL 1 FOR 5.0;
		}
	}
}

TRANSITION_LIST("testout0")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 2566.9;
		NODE
		{
			REPEAT = 116;
			LEVEL 1 FOR 2560.0;
			LEVEL 0 FOR 2560.0;
		}
		LEVEL 1 FOR 2560.0;
		LEVEL 0 FOR 953.1;
	}
}

TRANSITION_LIST("testout1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600000.0;
	}
}

TRANSITION_LIST("testout2")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600000.0;
	}
}

TRANSITION_LIST("testout3")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600000.0;
	}
}

TRANSITION_LIST("testout4")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600000.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "dataout0";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dataout1";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dataout2";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 2;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dataout3";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 3;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dataout4";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 4;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dataout5";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dataout6";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dataout7";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 7;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "pin_clk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 8;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "testout0";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 9;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "testout1";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 10;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "testout2";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 11;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "testout3";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 12;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "testout4";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 13;
	TREE_LEVEL = 0;
}

TIME_BAR
{
	TIME = 0;
	MASTER = TRUE;
}
;
💿 文件大小 232 K
👤 上传用户 sheng_xia
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#SIMULATOR #ACEXEP #LCD #208
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