mcs_51.tan.summary

程序主要用硬件描述语言（VHDL）实现： 单片机与FPGA接口通信的问题

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 9.400 ns
From           : P0[5]
To             : mcs_51:inst|LATCH_ADDRES[5]
From Clock     : 
To Clock       : ALE
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 30.000 ns
From           : mcs_51:inst|LATCH_OUT1[3]
To             : DATAOUT1[3]
From Clock     : P2[1]
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 23.100 ns
From           : P2[1]
To             : P0[5]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 14.900 ns
From           : P0[3]
To             : mcs_51:inst|LATCH_OUT1[3]
From Clock     : 
To Clock       : P2[1]
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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