key_scan.hier_info

程序主要是用硬件描述语言（VHDL）实现： 4*4键盘扫描

enter => data2[5]~reg0.CLK
enter => data2[4]~reg0.CLK
enter => data2[3]~reg0.CLK
enter => data2[2]~reg0.CLK
enter => data2[1]~reg0.CLK
enter => data2[0]~reg0.CLK
enter => data1[7]~reg0.CLK
enter => data1[6]~reg0.CLK
enter => data1[5]~reg0.CLK
enter => data1[4]~reg0.CLK
enter => data1[3]~reg0.CLK
enter => data1[2]~reg0.CLK
enter => data1[1]~reg0.CLK
enter => data1[0]~reg0.CLK
enter => data8[7]~reg0.CLK
enter => data8[6]~reg0.CLK
enter => data8[5]~reg0.CLK
enter => data8[4]~reg0.CLK
enter => data8[3]~reg0.CLK
enter => data8[2]~reg0.CLK
enter => data8[1]~reg0.CLK
enter => data8[0]~reg0.CLK
enter => data7[7]~reg0.CLK
enter => data7[6]~reg0.CLK
enter => data7[5]~reg0.CLK
enter => data7[4]~reg0.CLK
enter => data7[3]~reg0.CLK
enter => data7[2]~reg0.CLK
enter => data7[1]~reg0.CLK
enter => data7[0]~reg0.CLK
enter => data6[7]~reg0.CLK
enter => data6[6]~reg0.CLK
enter => data6[5]~reg0.CLK
enter => data6[4]~reg0.CLK
enter => data6[3]~reg0.CLK
enter => data6[2]~reg0.CLK
enter => data6[1]~reg0.CLK
enter => data6[0]~reg0.CLK
enter => b[1].ACLR
enter => data5[7]~reg0.CLK
enter => b[0].ACLR
enter => b[2].ACLR
enter => c[2].LATCH_ENABLE
enter => c[1].LATCH_ENABLE
enter => c[0].LATCH_ENABLE
enter => data5_0[7].ENA
enter => data5_0[6].ENA
enter => data5_0[5].ENA
enter => data5_0[4].ENA
enter => data5_0[3].ENA
enter => data5_0[2].ENA
enter => data5_0[1].ENA
enter => data5_0[0].ENA
enter => data4_0[7].ENA
enter => data4_0[6].ENA
enter => data4_0[5].ENA
enter => data4_0[4].ENA
enter => data4_0[3].ENA
enter => data4_0[2].ENA
enter => data4_0[1].ENA
enter => data4_0[0].ENA
enter => data3_0[7].ENA
enter => data3_0[6].ENA
enter => data3_0[5].ENA
enter => data3_0[4].ENA
enter => data3_0[3].ENA
enter => data3_0[2].ENA
enter => data3_0[1].ENA
enter => data3_0[0].ENA
enter => data2_0[7].ENA
enter => data2_0[6].ENA
enter => data2_0[5].ENA
enter => data2_0[4].ENA
enter => data2_0[3].ENA
enter => data2_0[2].ENA
enter => data2_0[1].ENA
enter => data2_0[0].ENA
enter => data1_0[7].ENA
enter => data1_0[6].ENA
enter => data1_0[5].ENA
enter => data1_0[4].ENA
enter => data1_0[3].ENA
enter => data1_0[2].ENA
enter => data1_0[1].ENA
enter => data1_0[0].ENA
ci => data5_0[6].CLK
ci => data5_0[5].CLK
ci => data5_0[4].CLK
ci => data5_0[3].CLK
ci => data5_0[2].CLK
ci => data5_0[1].CLK
ci => data5_0[0].CLK
ci => data4_0[7].CLK
ci => data4_0[6].CLK
ci => data4_0[5].CLK
ci => data4_0[4].CLK
ci => data4_0[3].CLK
ci => data4_0[2].CLK
ci => data4_0[1].CLK
ci => data4_0[0].CLK
ci => data3_0[7].CLK
ci => data3_0[6].CLK
ci => data3_0[5].CLK
ci => data3_0[4].CLK
ci => data3_0[3].CLK
ci => data3_0[2].CLK
ci => data3_0[1].CLK
ci => data3_0[0].CLK
ci => data2_0[7].CLK
ci => data2_0[6].CLK
ci => data2_0[5].CLK
ci => data2_0[4].CLK
ci => data2_0[3].CLK
ci => data2_0[2].CLK
ci => data2_0[1].CLK
ci => data2_0[0].CLK
ci => data1_0[7].CLK
ci => data1_0[6].CLK
ci => data1_0[5].CLK
ci => data1_0[4].CLK
ci => data1_0[3].CLK
ci => data1_0[2].CLK
ci => data1_0[1].CLK
ci => data1_0[0].CLK
ci => b[2].CLK
ci => b[1].CLK
ci => b[0].CLK
ci => data5_0[7].CLK
data_bcd[0] => data1_0[0].DATAIN
data_bcd[1] => data1_0[1].DATAIN
data_bcd[2] => data1_0[2].DATAIN
data_bcd[3] => data1_0[3].DATAIN
data1[0] <= data1[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data1[1] <= data1[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data1[2] <= data1[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data1[3] <= data1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data1[4] <= data1[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data1[5] <= data1[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data1[6] <= data1[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data1[7] <= data1[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[0] <= data2[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[1] <= data2[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[2] <= data2[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[3] <= data2[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[4] <= data2[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[5] <= data2[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[6] <= data2[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data2[7] <= data2[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[0] <= data3[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[1] <= data3[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[2] <= data3[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[3] <= data3[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[4] <= data3[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[5] <= data3[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[6] <= data3[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data3[7] <= data3[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[0] <= data4[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[1] <= data4[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[2] <= data4[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[3] <= data4[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[4] <= data4[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[5] <= data4[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[6] <= data4[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data4[7] <= data4[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[0] <= data5[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[1] <= data5[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[2] <= data5[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[3] <= data5[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[4] <= data5[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[5] <= data5[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[6] <= data5[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data5[7] <= data5[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[0] <= data6[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[1] <= data6[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[2] <= data6[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[3] <= data6[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[4] <= data6[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[5] <= data6[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[6] <= data6[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data6[7] <= data6[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[0] <= data7[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[1] <= data7[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[2] <= data7[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[3] <= data7[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[4] <= data7[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[5] <= data7[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[6] <= data7[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data7[7] <= data7[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[0] <= data8[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[1] <= data8[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[2] <= data8[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[3] <= data8[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[4] <= data8[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[5] <= data8[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[6] <= data8[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data8[7] <= data8[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|key_scan_lie|Keyboard:inst
clk => Clock_1[13].CLK
clk => Clock_1[12].CLK
clk => Clock_1[11].CLK
clk => Clock_1[10].CLK
clk => Clock_1[9].CLK
clk => Clock_1[8].CLK
clk => Clock_1[7].CLK
clk => Clock_1[6].CLK
clk => Clock_1[5].CLK
clk => Clock_1[4].CLK
clk => Clock_1[3].CLK
clk => Clock_1[2].CLK
clk => Clock_1[1].CLK
clk => Clock_1[0].CLK
clk => Clock_1[14].CLK
KIN[0] => reduce_nor~4.IN4
KIN[0] => reduce_nor~8.IN4
KIN[0] => reduce_nor~12.IN4
KIN[0] => reduce_nor~16.IN4
KIN[0] => reduce_nor~5.IN4
KIN[0] => reduce_nor~6.IN4
KIN[0] => reduce_nor~7.IN4
KIN[0] => reduce_nor~9.IN4
KIN[0] => reduce_nor~10.IN4
KIN[0] => reduce_nor~11.IN4
KIN[0] => reduce_nor~13.IN4
KIN[0] => reduce_nor~14.IN4
KIN[0] => reduce_nor~15.IN4
KIN[0] => reduce_nor~17.IN4
KIN[0] => reduce_nor~18.IN4
KIN[0] => reduce_nor~2.IN0
KIN[1] => reduce_nor~5.IN5
KIN[1] => reduce_nor~9.IN5
KIN[1] => reduce_nor~13.IN5
KIN[1] => reduce_nor~17.IN5
KIN[1] => reduce_nor~4.IN5
KIN[1] => reduce_nor~6.IN5
KIN[1] => reduce_nor~7.IN5
KIN[1] => reduce_nor~8.IN5
KIN[1] => reduce_nor~10.IN5
KIN[1] => reduce_nor~11.IN5
KIN[1] => reduce_nor~12.IN5
KIN[1] => reduce_nor~14.IN5
KIN[1] => reduce_nor~15.IN5
KIN[1] => reduce_nor~16.IN5
KIN[1] => reduce_nor~18.IN5
KIN[1] => reduce_nor~2.IN1
KIN[2] => reduce_nor~6.IN6
KIN[2] => reduce_nor~10.IN6
KIN[2] => reduce_nor~14.IN6
KIN[2] => reduce_nor~18.IN6
KIN[2] => reduce_nor~4.IN6
KIN[2] => reduce_nor~5.IN6
KIN[2] => reduce_nor~7.IN6
KIN[2] => reduce_nor~8.IN6
KIN[2] => reduce_nor~9.IN6
KIN[2] => reduce_nor~11.IN6
KIN[2] => reduce_nor~12.IN6
KIN[2] => reduce_nor~13.IN6
KIN[2] => reduce_nor~15.IN6
KIN[2] => reduce_nor~16.IN6
KIN[2] => reduce_nor~17.IN6
KIN[2] => reduce_nor~2.IN2
KIN[3] => reduce_nor~7.IN7
KIN[3] => reduce_nor~11.IN7
KIN[3] => reduce_nor~15.IN7
KIN[3] => reduce_nor~4.IN7
KIN[3] => reduce_nor~5.IN7
KIN[3] => reduce_nor~6.IN7
KIN[3] => reduce_nor~8.IN7
KIN[3] => reduce_nor~9.IN7
KIN[3] => reduce_nor~10.IN7
KIN[3] => reduce_nor~12.IN7
KIN[3] => reduce_nor~13.IN7
KIN[3] => reduce_nor~14.IN7
KIN[3] => reduce_nor~16.IN7
KIN[3] => reduce_nor~17.IN7
KIN[3] => reduce_nor~18.IN7
KIN[3] => reduce_nor~2.IN3
ScanSignal[0] <= SCN[0].DB_MAX_OUTPUT_PORT_TYPE
ScanSignal[1] <= SCN[1].DB_MAX_OUTPUT_PORT_TYPE
ScanSignal[2] <= SCN[2].DB_MAX_OUTPUT_PORT_TYPE
ScanSignal[3] <= SCN[3].DB_MAX_OUTPUT_PORT_TYPE
Num[0] <= Num[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Num[1] <= Num[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Num[2] <= Num[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Num[3] <= Num[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
enter <= enter~reg0.DB_MAX_OUTPUT_PORT_TYPE
ci <= ci~reg0.DB_MAX_OUTPUT_PORT_TYPE