trans4_16.tan.qmsg

看了好多网了

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version " "Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Aug 13 18:52:40 2005 " "Info: Processing started: Sat Aug 13 18:52:40 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off trans4_16 -c trans4_16 " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off trans4_16 -c trans4_16" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "in4\[0\] out16\[15\] 15.000 ns Longest " "Info: Longest tpd from source pin \"in4\[0\]\" to destination pin \"out16\[15\]\" is 15.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns in4\[0\] 1 PIN PIN_9 16 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_9; Fanout = 16; PIN Node = 'in4\[0\]'" {  } { { "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" "" { Report "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" Compiler "trans4_16" "UNKNOWN" "V1" "D:/Quartus/trans4_16/db/trans4_16.quartus_db" { Floorplan "D:/Quartus/trans4_16/" "" "" { in4[0] } "NODE_NAME" } "" } } { "trans4_16.vhd" "" { Text "D:/Quartus/trans4_16/trans4_16.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(7.000 ns) 11.000 ns Mux~385 2 COMB LC56 1 " "Info: 2: + IC(2.000 ns) + CELL(7.000 ns) = 11.000 ns; Loc. = LC56; Fanout = 1; COMB Node = 'Mux~385'" {  } { { "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" "" { Report "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" Compiler "trans4_16" "UNKNOWN" "V1" "D:/Quartus/trans4_16/db/trans4_16.quartus_db" { Floorplan "D:/Quartus/trans4_16/" "" "9.000 ns" { in4[0] Mux~385 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 15.000 ns out16\[15\] 3 PIN PIN_37 0 " "Info: 3: + IC(0.000 ns) + CELL(4.000 ns) = 15.000 ns; Loc. = PIN_37; Fanout = 0; PIN Node = 'out16\[15\]'" {  } { { "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" "" { Report "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" Compiler "trans4_16" "UNKNOWN" "V1" "D:/Quartus/trans4_16/db/trans4_16.quartus_db" { Floorplan "D:/Quartus/trans4_16/" "" "4.000 ns" { Mux~385 out16[15] } "NODE_NAME" } "" } } { "trans4_16.vhd" "" { Text "D:/Quartus/trans4_16/trans4_16.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "13.000 ns 86.67 % " "Info: Total cell delay = 13.000 ns ( 86.67 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 13.33 % " "Info: Total interconnect delay = 2.000 ns ( 13.33 % )" {  } {  } 0}  } { { "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" "" { Report "D:/Quartus/trans4_16/db/trans4_16_cmp.qrpt" Compiler "trans4_16" "UNKNOWN" "V1" "D:/Quartus/trans4_16/db/trans4_16.quartus_db" { Floorplan "D:/Quartus/trans4_16/" "" "15.000 ns" { in4[0] Mux~385 out16[15] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "15.000 ns" { in4[0] in4[0]~out Mux~385 out16[15] } { 0.000ns 0.000ns 2.000ns 0.000ns } { 0.000ns 2.000ns 7.000ns 4.000ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Aug 13 18:52:41 2005 " "Info: Processing ended: Sat Aug 13 18:52:41 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}