step_motor.vho

来自「步进电机控制器,控制电机的VHDL源程序」· VHO 代码 · 共 952 行 · 第 1/5 页

VHO
952 行
字号
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SIGNAL DIRECTION_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DIRECTION_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DIRECTION_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL DIRECTION_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a1_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a1_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a2_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a2_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a307_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a3_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a3_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a311_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a4_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a4_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a315_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a5_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL delay_rtl_1_adffs_a5_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL osc_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL comp_a0_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_a_a319_I_papre_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pterm0_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pterm1_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pterm2_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pterm3_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pterm4_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pterm5_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pxor_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pclk_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_pena_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_paclr_bus : std_logic_vector(51 DOWNTO 0);
SIGNAL d_ff_rtl_0_adffs_a6_a_aI_papre_bus : std_logic_vector(51 DOWNTO 0);
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step_motor.vho - 源码说明

本页面展示了「步进电机控制器,控制电机的VHDL源程序」中的 step_motor.vho 源码文件，采用 VHO 编程语言编写，共 952 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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