step_motor.map.eqn

步进电机控制器,控制电机的VHDL源程序

-- Copyright (C) 1991-2005 Altera Corporation
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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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--B is B
B_or_out = !p;
B_reg_input = B_or_out;
B = DFFE(B_reg_input, GLOBAL(f), , , );


--\process4:B is \process4:B
\process4:B_or_out = !d;
\process4:B_reg_input = \process4:B_or_out;
\process4:B = DFFE(\process4:B_reg_input, GLOBAL(f), , , );


--A1L96 is LessThan~839
A1L96_or_out = C1_dffs[11];
A1L96 = comp[11] $ A1L96_or_out;


--A1L17 is LessThan~845
A1L17_or_out = C1_dffs[10];
A1L17 = comp[10] $ A1L17_or_out;


--A1L37 is LessThan~851
A1L37_or_out = C1_dffs[9];
A1L37 = comp[9] $ A1L37_or_out;


--A1L57 is LessThan~857
A1L57_or_out = C1_dffs[8];
A1L57 = comp[8] $ A1L57_or_out;


--A1L77 is LessThan~863
A1L77_or_out = C1_dffs[7];
A1L77 = comp[7] $ A1L77_or_out;


--A1L87 is LessThan~867
A1L87 = EXP(C1_dffs[5] & !comp[5]);


--A1L97 is LessThan~868
A1L97 = EXP(C1_dffs[4] & !comp[4]);


--A1L08 is LessThan~869
A1L08 = EXP(C1_dffs[3] & !comp[3]);


--A1L18 is LessThan~870
A1L18 = EXP(C1_dffs[2] & !comp[2]);


--A1L28 is LessThan~871
A1L28 = EXP(C1_dffs[1] & !comp[1]);


--A1L38 is LessThan~877
A1L38_p0_out = A1L87 & A1L97 & A1L08 & A1L18 & A1L28 & comp[0] & !C1_dffs[0];
A1L38_p1_out = A1L87 & !C1_dffs[4] & comp[4];
A1L38_p2_out = A1L87 & A1L97 & !C1_dffs[3] & comp[3];
A1L38_p3_out = A1L87 & A1L97 & A1L08 & !C1_dffs[2] & comp[2];
A1L38_p4_out = A1L87 & A1L97 & A1L08 & A1L18 & !C1_dffs[1] & comp[1];
A1L38_or_out = A1L58 # A1L38_p0_out # A1L38_p1_out # A1L38_p2_out # A1L38_p3_out # A1L38_p4_out;
A1L38 = A1L38_or_out;


--A1L48 is LessThan~878
A1L48_or_out = C1_dffs[6];
A1L48 = comp[6] $ A1L48_or_out;


--C1_dffs[0] is lpm_counter:d_ff_rtl_0|dffs[0]
C1_dffs[0]_p0_out = !C1_dffs[0] & !A1L17 & !A1L96 & !A1L37 & !A1L57 & !A1L77 & A1L38 & !A1L48;
C1_dffs[0]_p1_out = !C1_dffs[0] & !A1L17 & !A1L96 & comp[9] & !C1_dffs[9];
C1_dffs[0]_p2_out = !C1_dffs[0] & !A1L17 & !A1L96 & !A1L37 & comp[8] & !C1_dffs[8];
C1_dffs[0]_p3_out = !C1_dffs[0] & !A1L17 & !A1L96 & !A1L37 & !A1L57 & comp[7] & !C1_dffs[7];
C1_dffs[0]_p4_out = !C1_dffs[0] & !A1L17 & !A1L96 & !A1L37 & !A1L57 & !A1L77 & comp[6] & !C1_dffs[6];
C1_dffs[0]_or_out = C1L21 # C1_dffs[0]_p0_out # C1_dffs[0]_p1_out # C1_dffs[0]_p2_out # C1_dffs[0]_p3_out # C1_dffs[0]_p4_out;
C1_dffs[0]_reg_input = C1_dffs[0]_or_out;
C1_dffs[0] = DFFE(C1_dffs[0]_reg_input, GLOBAL(f), , , );


--C2_dffs[0] is lpm_counter:delay_rtl_1|dffs[0]
C2_dffs[0]_p1_out = !C2_dffs[5] & !C2_dffs[0];
C2_dffs[0]_p2_out = !C2_dffs[0] & !C2_dffs[4];
C2_dffs[0]_p3_out = !C2_dffs[0] & !C2_dffs[3] & !C2_dffs[2] & !C2_dffs[1];
C2_dffs[0]_or_out = C2_dffs[0]_p1_out # C2_dffs[0]_p2_out # C2_dffs[0]_p3_out;
C2_dffs[0]_reg_input = C2_dffs[0]_or_out;
C2_dffs[0] = DFFE(C2_dffs[0]_reg_input, GLOBAL(f), , , );


--PHASE is PHASE
PHASE_reg_input = VCC;
PHASE_p3_out = B & p;
PHASE = TFFE(PHASE_reg_input, GLOBAL(f), , , PHASE_p3_out);


--DIRECTION is DIRECTION
DIRECTION_reg_input = VCC;
DIRECTION_p3_out = \process4:B & d;
DIRECTION = TFFE(DIRECTION_reg_input, GLOBAL(f), , , DIRECTION_p3_out);


--C1_dffs[1] is lpm_counter:d_ff_rtl_0|dffs[1]
C1_dffs[1]_p0_out = A1L96 & A1L76;
C1_dffs[1]_p1_out = A1L76 & A1L86 & A1L07 & !A1L38 & A1L27 & A1L47 & A1L67;
C1_dffs[1]_p2_out = A1L76 & A1L86 & A1L07 & A1L27 & A1L57;
C1_dffs[1]_p3_out = A1L76 & A1L86 & A1L07 & A1L27 & A1L47 & A1L77;
C1_dffs[1]_p4_out = A1L76 & A1L86 & A1L07 & A1L27 & A1L47 & A1L67 & A1L48;
C1_dffs[1]_or_out = C1L41 # C1_dffs[1]_p0_out # C1_dffs[1]_p1_out # C1_dffs[1]_p2_out # C1_dffs[1]_p3_out # C1_dffs[1]_p4_out;
C1_dffs[1]_reg_input = !(C1_dffs[1]_or_out);
C1_dffs[1] = DFFE(C1_dffs[1]_reg_input, GLOBAL(f), , , );


--C2_dffs[1] is lpm_counter:delay_rtl_1|dffs[1]
C2_dffs[1]_p1_out = !C2_dffs[5] & C2_dffs[0];
C2_dffs[1]_p2_out = C2_dffs[0] & !C2_dffs[4];
C2_dffs[1]_p3_out = C2_dffs[0] & !C2_dffs[3] & !C2_dffs[2];
C2_dffs[1]_p4_out = C2_dffs[5] & C2_dffs[4] & C2_dffs[1];
C2_dffs[1]_or_out = C2_dffs[1]_p1_out # C2_dffs[1]_p2_out # C2_dffs[1]_p3_out # C2_dffs[1]_p4_out;
C2_dffs[1]_reg_input = C2_dffs[1]_or_out;
C2_dffs[1] = TFFE(C2_dffs[1]_reg_input, GLOBAL(f), , , );


--C1_dffs[2] is lpm_counter:d_ff_rtl_0|dffs[2]
C1_dffs[2]_p0_out = A1L76 & A1L86 & A1L07 & A1L27 & A1L47 & A1L67 & A1L48;
C1_dffs[2]_p1_out = A1L76 & A1L86 & !A1L38 & A1L07 & A1L27 & A1L47 & A1L67;
C1_dffs[2]_p2_out = A1L76 & A1L86 & A1L07 & A1L37;
C1_dffs[2]_p3_out = A1L76 & A1L86 & A1L07 & A1L27 & A1L57;
C1_dffs[2]_p4_out = A1L76 & A1L86 & A1L07 & A1L27 & A1L47 & A1L77;
C1_dffs[2]_or_out = C1L61 # C1_dffs[2]_p0_out # C1_dffs[2]_p1_out # C1_dffs[2]_p2_out # C1_dffs[2]_p3_out # C1_dffs[2]_p4_out;
C1_dffs[2]_reg_input = !(C1_dffs[2]_or_out);
C1_dffs[2] = DFFE(C1_dffs[2]_reg_input, GLOBAL(f), , , );


--C2_dffs[2] is lpm_counter:delay_rtl_1|dffs[2]
C2_dffs[2]_p1_out = !C2_dffs[5] & C2_dffs[1] & C2_dffs[0];
C2_dffs[2]_p2_out = C2_dffs[1] & C2_dffs[0] & !C2_dffs[4];
C2_dffs[2]_p3_out = C2_dffs[5] & C2_dffs[4] & C2_dffs[2];
C2_dffs[2]_or_out = C2_dffs[2]_p1_out # C2_dffs[2]_p2_out # C2_dffs[2]_p3_out;
C2_dffs[2]_reg_input = C2_dffs[2]_or_out;
C2_dffs[2] = TFFE(C2_dffs[2]_reg_input, GLOBAL(f), , , );


--C1L1 is lpm_counter:d_ff_rtl_0|_~307
C1L1_p1_out = C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1L1_or_out = C1_dffs[3];
C1L1 = C1L1_p1_out $ C1L1_or_out;


--C1_dffs[3] is lpm_counter:d_ff_rtl_0|dffs[3]
C1_dffs[3]_p0_out = !A1L17 & !A1L96 & C1L1 & !A1L37 & !A1L57 & !A1L77 & A1L38 & !A1L48;
C1_dffs[3]_p1_out = !A1L17 & !A1L96 & C1L1 & comp[9] & !C1_dffs[9];
C1_dffs[3]_p2_out = !A1L17 & !A1L96 & C1L1 & !A1L37 & comp[8] & !C1_dffs[8];
C1_dffs[3]_p3_out = !A1L17 & !A1L96 & C1L1 & !A1L37 & !A1L57 & comp[7] & !C1_dffs[7];
C1_dffs[3]_p4_out = !A1L17 & !A1L96 & C1L1 & !A1L37 & !A1L57 & !A1L77 & comp[6] & !C1_dffs[6];
C1_dffs[3]_or_out = C1L81 # C1_dffs[3]_p0_out # C1_dffs[3]_p1_out # C1_dffs[3]_p2_out # C1_dffs[3]_p3_out # C1_dffs[3]_p4_out;
C1_dffs[3]_reg_input = C1_dffs[3]_or_out;
C1_dffs[3] = DFFE(C1_dffs[3]_reg_input, GLOBAL(f), , , );


--C2_dffs[3] is lpm_counter:delay_rtl_1|dffs[3]
C2_dffs[3]_p1_out = !C2_dffs[5] & C2_dffs[2] & C2_dffs[1] & C2_dffs[0];
C2_dffs[3]_p2_out = C2_dffs[2] & C2_dffs[1] & C2_dffs[0] & !C2_dffs[4];
C2_dffs[3]_p3_out = C2_dffs[5] & C2_dffs[4] & C2_dffs[3];
C2_dffs[3]_or_out = C2_dffs[3]_p1_out # C2_dffs[3]_p2_out # C2_dffs[3]_p3_out;
C2_dffs[3]_reg_input = C2_dffs[3]_or_out;
C2_dffs[3] = TFFE(C2_dffs[3]_reg_input, GLOBAL(f), , , );


--C1L2 is lpm_counter:d_ff_rtl_0|_~311
C1L2_p1_out = C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1L2_or_out = C1_dffs[4];
C1L2 = C1L2_p1_out $ C1L2_or_out;


--C1_dffs[4] is lpm_counter:d_ff_rtl_0|dffs[4]
C1_dffs[4]_p0_out = !A1L17 & !A1L96 & C1L2 & !A1L37 & !A1L57 & !A1L77 & A1L38 & !A1L48;
C1_dffs[4]_p1_out = !A1L17 & !A1L96 & C1L2 & comp[9] & !C1_dffs[9];
C1_dffs[4]_p2_out = !A1L17 & !A1L96 & C1L2 & !A1L37 & comp[8] & !C1_dffs[8];
C1_dffs[4]_p3_out = !A1L17 & !A1L96 & C1L2 & !A1L37 & !A1L57 & comp[7] & !C1_dffs[7];
C1_dffs[4]_p4_out = !A1L17 & !A1L96 & C1L2 & !A1L37 & !A1L57 & !A1L77 & comp[6] & !C1_dffs[6];
C1_dffs[4]_or_out = C1L02 # C1_dffs[4]_p0_out # C1_dffs[4]_p1_out # C1_dffs[4]_p2_out # C1_dffs[4]_p3_out # C1_dffs[4]_p4_out;
C1_dffs[4]_reg_input = C1_dffs[4]_or_out;
C1_dffs[4] = DFFE(C1_dffs[4]_reg_input, GLOBAL(f), , , );


--C2_dffs[4] is lpm_counter:delay_rtl_1|dffs[4]
C2_dffs[4]_p1_out = C2_dffs[5] & C2_dffs[2] & C2_dffs[4];
C2_dffs[4]_p2_out = C2_dffs[5] & C2_dffs[4] & C2_dffs[1];
C2_dffs[4]_p3_out = C2_dffs[5] & C2_dffs[4] & C2_dffs[3];
C2_dffs[4]_p4_out = C2_dffs[2] & C2_dffs[1] & C2_dffs[3] & C2_dffs[0];
C2_dffs[4]_or_out = C2_dffs[4]_p1_out # C2_dffs[4]_p2_out # C2_dffs[4]_p3_out # C2_dffs[4]_p4_out;
C2_dffs[4]_reg_input = C2_dffs[4]_or_out;
C2_dffs[4] = TFFE(C2_dffs[4]_reg_input, GLOBAL(f), , , );


--C1L3 is lpm_counter:d_ff_rtl_0|_~315
C1L3_p1_out = C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1L3_or_out = C1_dffs[5];
C1L3 = C1L3_p1_out $ C1L3_or_out;


--C1_dffs[5] is lpm_counter:d_ff_rtl_0|dffs[5]
C1_dffs[5]_p0_out = !A1L17 & !A1L96 & C1L3 & !A1L37 & !A1L57 & !A1L77 & A1L38 & !A1L48;
C1_dffs[5]_p1_out = !A1L17 & !A1L96 & C1L3 & comp[9] & !C1_dffs[9];
C1_dffs[5]_p2_out = !A1L17 & !A1L96 & C1L3 & !A1L37 & comp[8] & !C1_dffs[8];
C1_dffs[5]_p3_out = !A1L17 & !A1L96 & C1L3 & !A1L37 & !A1L57 & comp[7] & !C1_dffs[7];
C1_dffs[5]_p4_out = !A1L17 & !A1L96 & C1L3 & !A1L37 & !A1L57 & !A1L77 & comp[6] & !C1_dffs[6];
C1_dffs[5]_or_out = C1L22 # C1_dffs[5]_p0_out # C1_dffs[5]_p1_out # C1_dffs[5]_p2_out # C1_dffs[5]_p3_out # C1_dffs[5]_p4_out;
C1_dffs[5]_reg_input = C1_dffs[5]_or_out;
C1_dffs[5] = DFFE(C1_dffs[5]_reg_input, GLOBAL(f), , , );


--C2_dffs[5] is lpm_counter:delay_rtl_1|dffs[5]
C2_dffs[5]_p1_out = C2_dffs[4] & C2_dffs[3] & C2_dffs[2] & C2_dffs[1] & !C2_dffs[5] & C2_dffs[0];
C2_dffs[5]_p2_out = !C2_dffs[4] & C2_dffs[5];
C2_dffs[5]_p3_out = !C2_dffs[3] & !C2_dffs[2] & !C2_dffs[1] & C2_dffs[5];
C2_dffs[5]_or_out = C2_dffs[5]_p1_out # C2_dffs[5]_p2_out # C2_dffs[5]_p3_out;
C2_dffs[5]_reg_input = C2_dffs[5]_or_out;
C2_dffs[5] = DFFE(C2_dffs[5]_reg_input, GLOBAL(f), , , );


--osc is osc
osc_p1_out = !C2_dffs[3] & !C2_dffs[2] & !C2_dffs[1];
osc_or_out = osc_p1_out # !C2_dffs[5] # !C2_dffs[4];
osc_reg_input = !osc_or_out;
osc = TFFE(osc_reg_input, GLOBAL(f), , , );


--A1L21 is comp[0]~1062
A1L21 = EXP(!comp[1] & !comp[11] & !comp[5] & !comp[4] & !comp[3] & !comp[2] & !comp[8] & !comp[10] & !comp[9] & !comp[7] & !comp[6]);


--A1L31 is comp[0]~1063
A1L31 = EXP(!comp[11] & !comp[5] & !comp[4] & !comp[3] & !comp[2] & !comp[8] & !comp[10] & !comp[9] & !comp[7] & !comp[6]);


--A1L41 is comp[0]~1064
A1L41 = EXP(!comp[5] & !comp[4] & !comp[3] & !comp[2]);


--A1L51 is comp[0]~1065
A1L51 = EXP(comp[8] & comp[7] & comp[6]);


--A1L61 is comp[0]~1066
A1L61 = EXP(!comp[10] & !comp[9]);


--comp[0] is comp[0]
comp[0]_p0_out = speed[1] & comp[0] & comp[11] & A1L61;
comp[0]_p1_out = A1L31 & !speed[1] & speed[0] & !comp[0];
comp[0]_p2_out = speed[1] & comp[0] & A1L41 & comp[11] & comp[8] & comp[7] & comp[6];
comp[0]_p4_out = speed[1] & !speed[0] & !comp[0] & A1L51 & !comp[10] & !comp[9];
comp[0]_or_out = A1L71 # comp[0]_p0_out # comp[0]_p1_out # comp[0]_p2_out # comp[0]_p4_out;
comp[0]_reg_input = comp[0]_or_out;
comp[0] = DFFE(comp[0]_reg_input, osc, , , );


--C1L4 is lpm_counter:d_ff_rtl_0|_~319
C1L4_p1_out = C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1L4_or_out = C1_dffs[6];
C1L4 = C1L4_p1_out $ C1L4_or_out;


--C1_dffs[6] is lpm_counter:d_ff_rtl_0|dffs[6]
C1_dffs[6]_p0_out = !A1L17 & !A1L96 & C1L4 & !A1L37 & !A1L57 & !A1L77 & A1L38 & !A1L48;
C1_dffs[6]_p1_out = !A1L17 & !A1L96 & C1L4 & comp[9] & !C1_dffs[9];
C1_dffs[6]_p2_out = !A1L17 & !A1L96 & C1L4 & !A1L37 & comp[8] & !C1_dffs[8];
C1_dffs[6]_p3_out = !A1L17 & !A1L96 & C1L4 & !A1L37 & !A1L57 & comp[7] & !C1_dffs[7];
C1_dffs[6]_p4_out = !A1L17 & !A1L96 & C1L4 & !A1L37 & !A1L57 & !A1L77 & comp[6] & !C1_dffs[6];
C1_dffs[6]_or_out = C1L42 # C1_dffs[6]_p0_out # C1_dffs[6]_p1_out # C1_dffs[6]_p2_out # C1_dffs[6]_p3_out # C1_dffs[6]_p4_out;
C1_dffs[6]_reg_input = C1_dffs[6]_or_out;
C1_dffs[6] = DFFE(C1_dffs[6]_reg_input, GLOBAL(f), , , );


--C1L5 is lpm_counter:d_ff_rtl_0|_~323
C1L5_p1_out = C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1L5_or_out = C1_dffs[7];
C1L5 = C1L5_p1_out $ C1L5_or_out;


--C1_dffs[7] is lpm_counter:d_ff_rtl_0|dffs[7]
C1_dffs[7]_p0_out = !A1L17 & !A1L96 & C1L5 & !A1L37 & !A1L57 & !A1L77 & A1L38 & !A1L48;
C1_dffs[7]_p1_out = !A1L17 & !A1L96 & C1L5 & comp[9] & !C1_dffs[9];
C1_dffs[7]_p2_out = !A1L17 & !A1L96 & C1L5 & !A1L37 & comp[8] & !C1_dffs[8];
C1_dffs[7]_p3_out = !A1L17 & !A1L96 & C1L5 & !A1L37 & !A1L57 & comp[7] & !C1_dffs[7];
C1_dffs[7]_p4_out = !A1L17 & !A1L96 & C1L5 & !A1L37 & !A1L57 & !A1L77 & comp[6] & !C1_dffs[6];
C1_dffs[7]_or_out = C1L62 # C1_dffs[7]_p0_out # C1_dffs[7]_p1_out # C1_dffs[7]_p2_out # C1_dffs[7]_p3_out # C1_dffs[7]_p4_out;
C1_dffs[7]_reg_input = C1_dffs[7]_or_out;
C1_dffs[7] = DFFE(C1_dffs[7]_reg_input, GLOBAL(f), , , );