step_motor_vhd.sdo

步进电机控制器,控制电机的VHDL源程序

// Copyright (C) 1991-2005 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic       
// functions, and any output files any of the foregoing           
// (including device programming or simulation files), and any    
// associated documentation or information are expressly subject  
// to the terms and conditions of the Altera Program License      
// Subscription Agreement, Altera MegaCore Function License       
// Agreement, or other applicable license agreement, including,   
// without limitation, that your use is for the sole purpose of   
// programming logic devices manufactured by Altera and sold by   
// Altera or its authorized distributors.  Please refer to the    
// applicable agreement for further details.


// 
// Device: Altera EPM7128SLC84-15 Package PLCC84
// 

// 
// This SDF file should be used for ModelSim (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "step_motor")
  (DATE "08/13/2005 13:16:19")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE f_aI.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (3000:3000:3000) (3000:3000:3000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE d_aI.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE a_aprocess4_aB_aI.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE a_aprocess4_aB_aI.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE DIRECTION_aI.pcom)
    (DELAY
      (ABSOLUTE
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE DIRECTION_aI.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (PORT pena[0] (8000:8000:8000) (8000:8000:8000))
        (PORT pena[1] (8000:8000:8000) (8000:8000:8000))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (SETUP pena[0] (posedge clk) (4000:4000:4000))
      (SETUP pena[1] (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
      (HOLD pena[0] (posedge clk) (4000:4000:4000))
      (HOLD pena[1] (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE p_aI.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE B_aI.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE B_aI.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE PHASE_aI.pcom)
    (DELAY
      (ABSOLUTE
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE PHASE_aI.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (PORT pena[0] (8000:8000:8000) (8000:8000:8000))
        (PORT pena[1] (8000:8000:8000) (8000:8000:8000))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (SETUP pena[0] (posedge clk) (4000:4000:4000))
      (SETUP pena[1] (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
      (HOLD pena[0] (posedge clk) (4000:4000:4000))
      (HOLD pena[1] (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE speed_a0_a_aI.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE comp_a9_a_a1237_I.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[2] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[2] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[2] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm1[1] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm1[2] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm2[0] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm2[1] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm2[2] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm3[0] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm3[1] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm3[2] pexpout (6000:6000:6000) (6000:6000:6000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE speed_a1_a_aI.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_sexp")
    (INSTANCE comp_a0_a_a1062_I.pcom)
    (DELAY
      (ABSOLUTE
        (PORT datain[0] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[0] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[1] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[2] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[2] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[3] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[3] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[4] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[4] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[5] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[5] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[6] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[6] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[7] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[7] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[8] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[8] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[9] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[9] dataout (8000:8000:8000) (8000:8000:8000))
        (PORT datain[10] (2000:2000:2000) (2000:2000:2000))
        (IOPATH datain[10] dataout (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE comp_a0_a_a1165_I.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm0[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm0[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm0[2] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[2] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[3] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[4] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[5] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[6] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[7] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[8] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[9] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[10] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[11] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[12] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[13] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[2] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[3] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[2] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[3] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[4] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[5] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[6] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[7] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm3[8] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm4[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm4[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm4[2] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm0[0] pexpout (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm0[1] pexpout (6000:6000:6000) (6000:6000:6000))