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📄 buff8.fit.rpt

📁 八位双向三态控制
💻 RPT
📖 第 1 页 / 共 3 页
字号:
; bout[4]~82        ; 2           ;
; bout[3]~78        ; 2           ;
; bout[2]~74        ; 2           ;
; bout[1]~70        ; 2           ;
; bout[0]~66        ; 2           ;
; a[7]~0            ; 1           ;
; a[6]~1            ; 1           ;
; a[5]~2            ; 1           ;
; a[4]~3            ; 1           ;
; a[3]~4            ; 1           ;
; a[2]~5            ; 1           ;
; a[1]~6            ; 1           ;
; a[0]~7            ; 1           ;
; b[7]~0            ; 1           ;
; b[6]~1            ; 1           ;
; b[5]~2            ; 1           ;
; b[4]~3            ; 1           ;
; b[3]~4            ; 1           ;
; b[2]~5            ; 1           ;
; b[1]~6            ; 1           ;
; b[0]~7            ; 1           ;
; reduce_nor~23sexp ; 1           ;
; reduce_nor~22sexp ; 1           ;
+-------------------+-------------+


+------------------------------------------------+
; Interconnect Usage Summary                     ;
+----------------------------+-------------------+
; Interconnect Resource Type ; Usage             ;
+----------------------------+-------------------+
; Output enables             ; 2 / 6 ( 33 % )    ;
; PIA buffers                ; 43 / 288 ( 14 % ) ;
; PIAs                       ; 43 / 288 ( 14 % ) ;
+----------------------------+-------------------+


+----------------------------------------------------------------------------+
; LAB External Interconnect                                                  ;
+----------------------------------------------+-----------------------------+
; LAB External Interconnects  (Average = 5.38) ; Number of LABs  (Total = 3) ;
+----------------------------------------------+-----------------------------+
; 0                                            ; 5                           ;
; 1                                            ; 0                           ;
; 2                                            ; 0                           ;
; 3                                            ; 0                           ;
; 4                                            ; 0                           ;
; 5                                            ; 0                           ;
; 6                                            ; 0                           ;
; 7                                            ; 0                           ;
; 8                                            ; 0                           ;
; 9                                            ; 0                           ;
; 10                                           ; 0                           ;
; 11                                           ; 0                           ;
; 12                                           ; 0                           ;
; 13                                           ; 2                           ;
; 14                                           ; 0                           ;
; 15                                           ; 0                           ;
; 16                                           ; 0                           ;
; 17                                           ; 1                           ;
+----------------------------------------------+-----------------------------+


+----------------------------------------------------------------------+
; LAB Macrocells                                                       ;
+----------------------------------------+-----------------------------+
; Number of Macrocells  (Average = 2.25) ; Number of LABs  (Total = 3) ;
+----------------------------------------+-----------------------------+
; 0                                      ; 5                           ;
; 1                                      ; 0                           ;
; 2                                      ; 0                           ;
; 3                                      ; 0                           ;
; 4                                      ; 0                           ;
; 5                                      ; 1                           ;
; 6                                      ; 1                           ;
; 7                                      ; 1                           ;
+----------------------------------------+-----------------------------+


+-------------------------------------------------------------------------------+
; Shareable Expander                                                            ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders  (Average = 0.25) ; Number of LABs  (Total = 1) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 7                           ;
; 1                                               ; 0                           ;
; 2                                               ; 1                           ;
+-------------------------------------------------+-----------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection                                                                                                           ;
+-----+------------+-------------------------------------------------+-----------------------------------------------------------------+
; LAB ; Logic Cell ; Input                                           ; Output                                                          ;
+-----+------------+-------------------------------------------------+-----------------------------------------------------------------+
;  A  ; LC3        ; b[7], aout[7]~94, ncs, rd, wr                   ; aout[7]~94, a[7]                                                ;
;  A  ; LC5        ; b[6], aout[6]~90, ncs, rd, wr                   ; aout[6]~90, a[6]                                                ;
;  A  ; LC6        ; b[5], aout[5]~86, ncs, rd, wr                   ; aout[5]~86, a[5]                                                ;
;  A  ; LC8        ; b[4], aout[4]~82, ncs, rd, wr                   ; aout[4]~82, a[4]                                                ;
;  A  ; LC11       ; b[3], aout[3]~78, ncs, rd, wr                   ; aout[3]~78, a[3]                                                ;
;  A  ; LC13       ; b[2], aout[2]~74, ncs, rd, wr                   ; aout[2]~74, a[2]                                                ;
;  A  ; LC14       ; b[1], aout[1]~70, ncs, rd, wr                   ; aout[1]~70, a[1]                                                ;
;  B  ; LC24       ; a[0], bout[0]~66, ncs, rd, wr                   ; b[0], bout[0]~66                                                ;
;  B  ; LC21       ; a[1], bout[1]~70, ncs, rd, wr                   ; b[1], bout[1]~70                                                ;
;  B  ; LC19       ; a[2], bout[2]~74, ncs, rd, wr                   ; b[2], bout[2]~74                                                ;
;  B  ; LC17       ; a[3], bout[3]~78, ncs, rd, wr                   ; b[3], bout[3]~78                                                ;
;  B  ; LC29       ; b[0], aout[0]~66, ncs, rd, wr                   ; aout[0]~66, a[0]                                                ;
;  C  ; LC40       ; a[7], bout[7]~94, ncs, rd, wr                   ; b[7], bout[7]~94                                                ;
;  C  ; LC43       ; a[6], bout[6]~90, ncs, rd, wr                   ; b[6], bout[6]~90                                                ;
;  C  ; LC45       ; a[5], bout[5]~86, ncs, rd, wr                   ; b[5], bout[5]~86                                                ;
;  C  ; LC46       ; a[4], bout[4]~82, ncs, rd, wr                   ; b[4], bout[4]~82                                                ;
;  C  ; LC48       ; process0_67~10, ncs, rd, wr, reduce_nor~23sexp  ; b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7], process0_67~10  ;
;  C  ; LC35       ; process0_193~10, reduce_nor~22sexp, ncs, rd, wr ; process0_193~10, a[0], a[1], a[2], a[3], a[4], a[5], a[6], a[7] ;
+-----+------------+-------------------------------------------------+-----------------------------------------------------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version
    Info: Processing started: Fri Aug 12 14:58:53 2005
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off buff8 -c buff8
Info: Selected device EPM7128SLC84-15 for design "buff8"
Warning: I/O standard setting for individual pin "b[0]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "b[1]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "b[2]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "b[3]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "b[4]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "b[5]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "b[6]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "b[7]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "ncs" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "rd" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "wr" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[0]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[1]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[2]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[3]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[4]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[5]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[6]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Warning: I/O standard setting for individual pin "a[7]" not supported for selected device family -- setting I/O standard for pins according to device-wide I/O standard
Info: Quartus II Fitter was successful. 0 errors, 19 warnings
    Info: Processing ended: Fri Aug 12 14:58:54 2005
    Info: Elapsed time: 00:00:02


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