wreg378.h

keil C51 LCD 驱动源码,其中还有I2C驱动,ADC驱动,键盘操作等,是一个完整的keil源代码,供大家参考

/****************************************************************************
   +----------------------------------------------------------------------+
   | Copyright Trumpion Microelectronics Inc. 1999                        |
   | Trumpion Microelectronics Inc. reserves the right to change products |
   | or specifications without notice.                                    |
   +----------------------------------------------------------------------+
   Project    : LCD monitor
   Version    : 0.94
   File Name  : wreg378.h
   Functions  : general and special register definition for W78E378
   Revision   :

   1999-05-18  OriginalTeam    First Created
****************************************************************************/

#ifndef _WREG378_H
#define _WREG378_H

/***************************************************************************
* byte registers
***************************************************************************/

// P0 is not available 
// sfr    P0    = 0x80;
sfr    P1    = 0x90;
sfr    P2    = 0xA0;
sfr    P3    = 0xB0;
sfr    PSW   = 0xD0;
sfr    ACC   = 0xE0;
sfr    B     = 0xF0;
sfr    SP    = 0x81;
sfr    DPL   = 0x82;
sfr    DPH   = 0x83;
sfr    PCON  = 0x87;
sfr    TCON  = 0x88;
sfr    TMOD  = 0x89;
sfr    TL0   = 0x8A;
sfr    TL1   = 0x8B;
sfr    TH0   = 0x8C;
sfr    TH1   = 0x8D;
sfr    IE    = 0xA8;
sfr    IP    = 0xB8;

/***************************************************************************
* W78E378B SPECIFIC REGISTERS
***************************************************************************/

sfr    TMREG   = 0xC0;
sfr    S1CON   = 0xD8;
sfr    S1STA   = 0xD9;
sfr    S1DAT   = 0xDA;
sfr    S1ADR1  = 0xDB;
sfr    S1ADR2  = 0xDC;

sfr    S2CON   = 0xE8;
sfr    S2STA   = 0xE9;
sfr    S2DAT   = 0xEA;
sfr    S2ADR   = 0xEB;
sfr    S2ADR2  = 0xEC;

/***************************************************************************
* BIT REGISTERS
***************************************************************************/

/***************************************************************************
* PSW BITS
***************************************************************************/

sbit    CY    = 0xD7;
sbit    AC    = 0xD6;
sbit    F0    = 0xD5;
sbit    RS1   = 0xD4;
sbit    RS0   = 0xD3;
sbit    OV    = 0xD2;
sbit    P     = 0xD0;

/***************************************************************************
* TCON BITS
***************************************************************************/

sbit    TF1   = 0x8F;
sbit    TR1   = 0x8E;
sbit    TF0   = 0x8D;
sbit    TR0   = 0x8C;
sbit    IE1   = 0x8B;
sbit    IT1   = 0x8A;
sbit    IE0   = 0x89;
sbit    IT0   = 0x88;

/***************************************************************************
* IE BITS
***************************************************************************/

sbit    EA    = 0xAF;
sbit    ES1   = 0xAD;
sbit    ET1   = 0xAB;
sbit    EX1   = 0xAA;
sbit    ET0   = 0xA9;
sbit    EX0   = 0xA8;

/***************************************************************************
* IP BITS
***************************************************************************/

sbit    PS1   = 0xBD;
sbit    PT1   = 0xBB;
sbit    PX1   = 0xBA;
sbit    PT0   = 0xB9;
sbit    PX0   = 0xB8;

/***************************************************************************
* P1 BITS
***************************************************************************/

sbit    P1_7  = 0x97;
sbit    P1_6  = 0x96;
sbit    P1_5  = 0x95;
sbit    P1_4  = 0x94;
sbit    P1_3  = 0x93;
sbit    P1_2  = 0x92;
sbit    P1_1  = 0x91;
sbit    P1_0  = 0x90;

/***************************************************************************
* P2 BITS
***************************************************************************/

sbit    P2_7  = 0xA7;
sbit    P2_6  = 0xA6;
sbit    P2_5  = 0xA5;
sbit    P2_4  = 0xA4;
sbit    P2_3  = 0xA3;
sbit    P2_2  = 0xA2;
sbit    P2_1  = 0xA1;
sbit    P2_0  = 0xA0;

/***************************************************************************
* P3 BITS
***************************************************************************/

sbit    P3_7  = 0xB7;
sbit    P3_6  = 0xB6;
sbit    P3_5  = 0xB5;
sbit    P3_4  = 0xB4;
sbit    P3_3  = 0xB3;
sbit    P3_2  = 0xB2;
sbit    P3_1  = 0xB1;
sbit    P3_0  = 0xB0;

/***************************************************************************
* PCON BITS
***************************************************************************/

sbit    ADCS2   = 0x87;
sbit    PD      = 0x88;
sbit    GF0     = 0x89;
sbit    GF1     = 0x8A;
sbit    TEST0   = 0x8B;
sbit    TEST1   = 0x8C;
sbit    ADCcal  = 0x8D;
sbit    CPUhalt = 0x8E;

/***************************************************************************
* S1CON BITS
***************************************************************************/

sbit    S1CR0    = 0xD8;
sbit    S1CR1    = 0xD9;
sbit    S1AA     = 0xDA;
sbit    S1SI     = 0xDB;
sbit    S1STO    = 0xDC;
sbit    S1STABit = 0xDD;
sbit    S1ENS    = 0xDE;
sbit    S1CR2    = 0xDF;

/***************************************************************************
* S2CON BITS
***************************************************************************/

sbit    S2CR0    = 0xE8;
sbit    S2CR1    = 0xE9;
sbit    S2AA     = 0xEA;
sbit    S2SI     = 0xEB;
sbit    S2STO    = 0xEC;
sbit    S2STABit = 0xED;
sbit    S2ENS    = 0xEE;
sbit    S2CR2    = 0xEF;


#define PBYTE ((unsigned char volatile pdata *) 0)

#define CTRL1      PBYTE [ 0x0080]
#define CTRL2      PBYTE [ 0x0081]
#define P1SF       PBYTE [ 0x0082]
#define P2SF       PBYTE [ 0x0083]
#define P3SF       PBYTE [ 0x0084]
#define PARAL      PBYTE [ 0x0085]
#define PARAH      PBYTE [ 0x0086]
#define HFCOUNTL   PBYTE [ 0x0087]
#define HFCOUNTH   PBYTE [ 0x0088]
#define VFCOUNTL   PBYTE [ 0x0089]
#define VFCOUNTH   PBYTE [ 0x008A]
#define WDTCLR     PBYTE [ 0x008B]
#define SOARL      PBYTE [ 0x008C]
#define SOARH      PBYTE [ 0x008D]
#define SOACLR     PBYTE [ 0x008E]
#define INTMSK     PBYTE [ 0x008F]
#define INTVECT    PBYTE [ 0x0090]
#define INTCLR     PBYTE [ 0x0091]
#define DDC1       PBYTE [ 0x0092]
#define ADC        PBYTE [ 0x0093]
#define DAC0       PBYTE [ 0x0094]
#define DAC1       PBYTE [ 0x0095]
#define DAC2       PBYTE [ 0x0096]
#define DAC3       PBYTE [ 0x0097]
#define DAC4       PBYTE [ 0x0098]
#define DAC5       PBYTE [ 0x0099]
#define DAC6       PBYTE [ 0x009A]
#define DAC7       PBYTE [ 0x009B]
#define DAC8       PBYTE [ 0x009C]
#define DAC9       PBYTE [ 0x009D]
#define DAC10      PBYTE [ 0x009E]
#define P4         PBYTE [ 0x009F]
#define CTRL3      PBYTE [ 0x00A0]

#endif /* ifndef _WREG378_H */