wreg180.h

keil C51 LCD 驱动源码,其中还有I2C驱动,ADC驱动,键盘操作等,是一个完整的keil源代码,供大家参考

/****************************************************************************
   +----------------------------------------------------------------------+
   | Copyright Trumpion Microelectronics Inc. 1999                        |
   | Trumpion Microelectronics Inc. reserves the right to change products |
   | or specifications without notice.                                    |
   +----------------------------------------------------------------------+
   Project    : LCD monitor
   Version    : 0.94
   File Name  : wreg180.h
   Functions  : general and special register definition for P87C380
   Revision   :

   1999-05-18  OriginalTeam    First Created
****************************************************************************/

#ifndef _WREG180_H
#define _WREG180_H

/***************************************************************************
* byte registers
***************************************************************************/

sfr    P0    = 0x80;
sfr    P1    = 0x90;
sfr    P2    = 0xA0;
sfr    P3    = 0xB0;
sfr    PSW   = 0xD0;
sfr    ACC   = 0xE0;
sfr    B     = 0xF0;
sfr    SP    = 0x81;
sfr    DPL   = 0x82;
sfr    DPH   = 0x83;
sfr    PCON  = 0x87;
sfr    TCON  = 0x88;
sfr    TMOD  = 0x89;
sfr    TL0   = 0x8A;
sfr    TL1   = 0x8B;
sfr    TH0   = 0x8C;
sfr    TH1   = 0x8D;
sfr    IE    = 0xA8;
sfr    IP    = 0xB8;

/***************************************************************************
* P8xCx80 SPECIFIC REGISTERS
***************************************************************************/

sfr    S1CON  = 0xD8;
sfr    S1STA  = 0xD9;
sfr    S1DAT  = 0xDA;
sfr    S1ADR  = 0xDB;
sfr    RAMBUF = 0x9C;   /* RAM BUFFER FOR DDC */
sfr    DDCCON = 0x9D;   /* DDC CONTROL REGISTER */
sfr    DDCADR = 0x9E;   /* DDC ADDRESS POINTER */
sfr    DDCDAT = 0x9F;   /* DDC1 SHIFT BUFFER */
sfr    DFCON  = 0xC0;  /* MISCELLANEOUS CONTROL REGISTER */
sfr    ADCDAT = 0xC1;  /* ADC CONTROL REGISTER */
sfr    PWM10H = 0xC6;  /* HIGH NIBBLE OF 14 BIT PWM */
sfr    PWM10L = 0xC7;  /* LOW NIBBLE OF 14 BIT PWM */
sfr    PWME1  = 0xC8;  /* PWM/DAC OUTPUT CONTROL REGISTER */
sfr    PWME2  = 0xE8;  /* PWM/DAC OUTPUT CONTROL REGISTER */
sfr    PWM0   = 0xC9;
sfr    PWM1   = 0xCA;
sfr    PWM2   = 0xCB;
sfr    PWM3   = 0xCC;
sfr    PWM4   = 0xCD;
sfr    PWM5   = 0xCE;
sfr    PWM6   = 0xCF;
sfr    PWM7   = 0xED;
sfr    PWM8   = 0xEE;
sfr    PWM9   = 0xEF;
sfr    DAC0   = 0xE9;
sfr    DAC1   = 0xEA;
sfr    DAC2   = 0xEB;
sfr    DAC3   = 0xEC;
sfr    HFP    = 0xF6;  /* FREE RUN CONTROL REGIATER FOR HSYNC OUT */
sfr    HFPOPW = 0xF7;  /* FREE RUN AND PULSE WIDTH FOR HSYNC OUT */
sfr    MDCST  = 0xF8;  /* MODE DETECTION AND STATUS REGISTER */
sfr    VFP    = 0xF9;  /* FREE RUN CONTROL REGISTER FOR VSYNC OUT */
sfr    VFPOPW = 0xFA;  /* FREE RUN AND PULSE WIDTH FOR VSYNC OUT */
sfr    PULCNT = 0xFB;  /* PULSE GENERATION CONTROL REGISTER */
sfr    HFHIGH = 0xFC;  /* HORIZONTAL PERIOD HIGH NIBBLE REGISTER */
sfr    VFHIGH = 0xFD;  /* VERTICAL PERIOD HIGH NIBBLE REGISTER */
sfr    VFLHFL = 0xFE;  /* VERTICAL LOW,HORIZONTAL LOW REGISTER */
sfr    T2     = 0xFF;  /* WATCHDOG TIMER DATA REGISTER */

/***************************************************************************
* BIT REGISTERS
***************************************************************************/

/***************************************************************************
* PSW BITS
***************************************************************************/

sbit   CY      = 0xD7;
sbit   AC      = 0xD6;
sbit   F0      = 0xD5;
sbit   RS1     = 0xD4;
sbit   RS0     = 0xD3;
sbit   OV      = 0xD2;
sbit   P       = 0xD0;

/***************************************************************************
* TCON BITS
***************************************************************************/

sbit   TF1     = 0x8F;
sbit   TR1     = 0x8E;
sbit   TF0     = 0x8D;
sbit   TR0     = 0x8C;
sbit   IE1     = 0x8B;
sbit   IT1     = 0x8A;
sbit   IE0     = 0x89;
sbit   IT0     = 0x88;

/***************************************************************************
* IE BITS
***************************************************************************/

sbit   EA      = 0xAF;
sbit   ES1     = 0xAD;
sbit   ET1     = 0xAB;
sbit   EX1     = 0xAA;
sbit   ET0     = 0xA9;
sbit   EX0     = 0xA8;

/***************************************************************************
* IP BITS
***************************************************************************/

sbit   PS1     = 0xBD;
sbit   PT1     = 0xBB;
sbit   PX1     = 0xBA;
sbit   PT0     = 0xB9;
sbit   PX0     = 0xB8;

/***************************************************************************
* P3 BITS
***************************************************************************/

sbit   P3_3    = 0xB3;
sbit   P3_2    = 0xB2;
sbit   P3_1    = 0xB1;
sbit   P3_0    = 0xB0;

/***************************************************************************
* P1 BITS
***************************************************************************/

sbit   P1_7    = 0x97;
sbit   P1_6    = 0x96;
sbit   P1_5    = 0x95;
sbit   P1_4    = 0x94;
sbit   P1_3    = 0x93;
sbit   P1_2    = 0x92;
sbit   P1_1    = 0x91;
sbit   P1_0    = 0x90;

sbit   SDA1    = 0x93;
sbit   SCL1    = 0x92;
sbit   SDA     = 0x91;
sbit   SCL     = 0x90;

/***************************************************************************
* P2 BITS
***************************************************************************/

sbit   P2_7    = 0xA7;
sbit   P2_6    = 0xA6;
sbit   P2_5    = 0xA5;
sbit   P2_4    = 0xA4;
sbit   P2_3    = 0xA3;
sbit   P2_2    = 0xA2;
sbit   P2_1    = 0xA1;
sbit   P2_0    = 0xA0;

/***************************************************************************
* P0 BITS
***************************************************************************/

sbit   P0_7    = 0x87;
sbit   P0_6    = 0x86;
sbit   P0_5    = 0x85;
sbit   P0_4    = 0x84;
sbit   P0_3    = 0x83;
sbit   P0_2    = 0x82;
sbit   P0_1    = 0x81;
sbit   P0_0    = 0x80;

/***************************************************************************
* S1CON BITS
***************************************************************************/

sbit   ENSI    = 0xDE;
sbit   STA     = 0xDD;
sbit   STO     = 0xDC;
sbit   SI      = 0xDB;
sbit   AA      = 0xDA;
sbit   CR1     = 0xD9;
sbit   CR0     = 0xD8;

/***************************************************************************
* PWME2 BITS
***************************************************************************/

sbit   PATENA  = 0xEF;
sbit   DACE3   = 0xEE;
sbit   DACE2   = 0xED;
sbit   DACE1   = 0xEC;
sbit   DACE0   = 0xEB;
sbit   PWME2_2 = 0xEA;
sbit   PWME2_1 = 0xE9;
sbit   PWME2_0 = 0xE8;

/***************************************************************************
* PWME1 BITS
***************************************************************************/

sbit   PWME1_7 = 0xCF;
sbit   PWME1_6 = 0xCE;
sbit   PWME1_5 = 0xCD;
sbit   PWME1_4 = 0xCC;
sbit   PWME1_3 = 0xCB;
sbit   PWME1_2 = 0xCA;
sbit   PWME1_1 = 0xC9;
sbit   PWME1_0 = 0xC8;

/***************************************************************************
* DFCON BITS
***************************************************************************/

sbit   EW2     = 0xC7;
sbit   SOGE    = 0xC6;
sbit   SYNCE   = 0xC5;
sbit   DDCE    = 0xC4;
sbit   S1E     = 0xC3;
sbit   ADCE    = 0xC2;
sbit   P14LVL  = 0xC1;
sbit   P8LVL   = 0xC0;

/***************************************************************************
* DFCON BITS
***************************************************************************/

sbit   MARCH   = 0xFF;
sbit   CHREQ   = 0xFE;
sbit   XSEL    = 0xFD;
sbit   HSEL    = 0xFC;
sbit   HPRES   = 0xFB;
sbit   VPRES   = 0xFA;
sbit   HPOL    = 0xF9;
sbit   VPOL    = 0xF8;

#endif /* ifndef _WREG180_H */