s_pw.vhd

电子密码锁的vhdl编程实现

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all; --包含库

entity s_pw is
  port(SDIN:  IN std_logic; -- 串行数据输入
       trig : IN std_logic; -- 触发时钟
       lock : in std_logic; -- 上锁信号
       sec : in std_logic;  -- 选择消隐输出
       CR:   IN std_logic; -- 确认输入
       SET:  IN std_logic; -- 设口令
       CRACK:IN std_logic; -- 解锁
       din:  out INTEGER RANGE 15 DOWNTO 0; --输入的数据进行显示
       n_err:  out std_logic_vector(1 downto 0); --错误次数
       n_cr :  out std_logic_vector(1 downto 0);  -- 输入数据个数
       ALERT:  OUT std_logic; --报警 输出
       lock_out: out std_logic; -- 上锁显示标志 
       sc:     out std_logic;  -- 消隐显示标志
       dead_lock: out std_logic   -- 死锁标志
      );
end entity s_pw;

architecture behv of s_pw is
--signal 声明
 signal pW_reg0:    INTEGER RANGE 15 DOWNTO 0;--口令寄存器
 signal pW_reg1:    INTEGER RANGE 15 DOWNTO 0;
 signal pW_reg2:    INTEGER RANGE 15 DOWNTO 0; 
 signal pW_reg3:    INTEGER RANGE 15 DOWNTO 0;
 
 signal pc_reg0:    INTEGER RANGE 15 DOWNTO 0;--解锁暂存器
 signal pc_reg1:    INTEGER RANGE 15 DOWNTO 0;
 signal pc_reg2:    INTEGER RANGE 15 DOWNTO 0;
 signal pc_reg3:    INTEGER RANGE 15 DOWNTO 0;

 signal data_cnt:  INTEGER RANGE 15 DOWNTO 0; -- 输入数据累加器
 signal cr_cnt  :  std_logic_vector(1  downto 0);
 signal err_cnt:   std_logic_vector(1  downto 0);
 signal sb :       std_logic; 

 TYPE states is(st0,st1,st2,st3,st4);
 signal currentstate,nextstate : states := st0; 
 signal i_SDIN,i_SET,i_CRACK,i_CR,i_lock : std_logic;

begin

process(trig)
begin
if trig'event and trig = '1'then 
 currentstate <= nextstate; 
 
 i_SDIN <= SDIN;
 i_CR   <= CR;
 i_SET  <= SET;
 i_CRACK<= CRACK;
 i_lock <= lock;
 if sec = '0' then sb <= not sb; sc <= sb;
 end if;
end if;
end process;

process(i_SDIN)
begin 
 if i_SDIN = '0' then 
  if data_cnt = 9 then data_cnt <= 0; 
  else data_cnt <= data_cnt + 1;
  end if;
 end if;
end process;

process(trig,currentstate,i_SDIN,i_CR)
begin
if trig'event and trig = '0' then 
if i_CR = '0' then 
 nextstate <= st0; lock_out <= '1'; err_cnt <= "00"; cr_cnt <= "00"; dead_lock <= '0';
else 
 if i_lock = '0' then lock_out <= '0';
  elsif currentstate = st4 then lock_out <= '1'; din <= 10;
 end if;

 case currentstate is 
  when st0 =>    din <= data_cnt;
   if i_SET = '0' then 
     case cr_cnt is
          when "00" => pW_reg0 <= data_cnt; cr_cnt <= cr_cnt + '1';  
          when "01" => pw_reg1 <= data_cnt; cr_cnt <= cr_cnt + '1';  
          when "10" => pw_reg2 <= data_cnt; cr_cnt <= cr_cnt + '1';  
          when "11" => pw_reg3 <= data_cnt; cr_cnt <= cr_cnt + '1';  
          when others => NULL;
     end case;
 	 nextstate <= st0;
   else if i_CRACK = '0' then nextstate <= st1;
   end if; 
   end if;
  when st1 =>  din <= data_cnt;   
   if i_CRACK = '0'  then -- 解锁
        case cr_cnt is
          when "00" => pc_reg0 <= data_cnt; cr_cnt <= cr_cnt + '1'; -- din <= data_cnt;       
          when "01" => pc_reg1 <= data_cnt; cr_cnt <= cr_cnt + '1'; --  din <= data_cnt;  
          when "10" => pc_reg2 <= data_cnt; cr_cnt <= cr_cnt + '1'; --  din <= data_cnt;  
          when "11" => cr_cnt <= cr_cnt + '1'; 
            if (pc_reg0 = pw_reg0) then 
              if (pc_reg1 = pw_reg1) then 
                if (pc_reg2 = pw_reg2) then 
                  if (data_cnt = pw_reg3) then err_cnt <= "00";nextstate <= st4;-- 解锁成功输出并开锁
                  else  err_cnt <= err_cnt + '1';  nextstate <= st2;
                  end if;
                else  err_cnt <= err_cnt + '1'; nextstate <= st2;
                end if;
              else  err_cnt <= err_cnt + '1'; nextstate <= st2;
              end if;
            else  err_cnt <= err_cnt + '1';  nextstate <= st2;
            end if;         
          when others => NULL;    
          end case;  
   end if;
  when st2 => din <= data_cnt;
   if err_cnt = 0 or err_cnt = 1 or err_cnt = 2 then  nextstate <= st1;
   else nextstate <= st3;
   end if;
  when st3 => 
   if err_cnt = 3 then din <= 11; nextstate <= st3; ALERT <= '1'; dead_lock <= '1';
   end if;
  when st4 =>
   if i_lock = '0' then nextstate <= st0;
   end if;
 end case;
end if;
end if;
 n_err <= err_cnt;
 n_cr  <= cr_cnt;
end process;
end behv;