shifter.fit.qmsg

用vhdl实现双向移位寄存器 仿真环境MAXPLUS-II

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 181 06/29/2004 SJ Full Version " "Info: Version 4.1 Build 181 06/29/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Jul 02 09:45:33 2005 " "Info: Processing started: Sat Jul 02 09:45:33 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --import_settings_files=off --export_settings_files=off shifter -c shifter " "Info: Command: quartus_fit --import_settings_files=off --export_settings_files=off shifter -c shifter" {  } {  } 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "shifter EP1S10F484C5 " "Info: Automatically selected device EP1S10F484C5 for design shifter" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation -- Fitter effort may be decreased to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1S20F484C5 " "Info: Device EP1S20F484C5 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "11 11 " "Info: No exact pin location assignment(s) for 11 pins of 11 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[3\] " "Info: Pin dout\[3\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 8 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dout\[3\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { dout[3] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { dout[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[2\] " "Info: Pin dout\[2\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 8 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dout\[2\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { dout[2] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { dout[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[1\] " "Info: Pin dout\[1\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 8 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dout\[1\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { dout[1] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { dout[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[0\] " "Info: Pin dout\[0\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 8 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "dout\[0\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { dout[0] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { dout[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[3\] " "Info: Pin din\[3\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 7 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "din\[3\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { din[3] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { din[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[2\] " "Info: Pin din\[2\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 7 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "din\[2\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { din[2] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { din[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "left_right " "Info: Pin left_right not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 6 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "left_right" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { left_right } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { left_right } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "load " "Info: Pin load not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 6 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "load" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { load } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { load } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clk " "Info: Pin clk not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 6 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { clk } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[1\] " "Info: Pin din\[1\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 7 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "din\[1\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { din[1] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { din[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[0\] " "Info: Pin din\[0\] not assigned to an exact location on the device" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 7 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "din\[0\]" } } } } { "d:/md/vhd/shifter/db/shifter_cmp.qrpt" "" "" { Report "d:/md/vhd/shifter/db/shifter_cmp.qrpt" Compiler "shifter" "UNKNOWN" "V1" "d:/md/vhd/shifter/db/shifter.quartus_db" { Floorplan "" "" "" { din[0] } "NODE_NAME" } } } { "d:/md/vhd/shifter/shifter.fld" "" "" { Floorplan "d:/md/vhd/shifter/shifter.fld" "" "" { din[0] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk Global clock in PIN L2 " "Info: Automatically promoted signal clk to use Global clock in PIN L2" {  } { { "d:/md/vhd/shifter/shifter.vhd" "" "" { Text "d:/md/vhd/shifter/shifter.vhd" 6 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_START_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Start DSP scan-chain inferencing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Completed DSP scan-chain inferencing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_START_LUT_IO_MAC_RAM_PACKING" "" "Info: Moving registers into I/Os, LUTs, DSP and RAM blocks to improve timing and density" {  } {  } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}