config_controller.fit.eqn

用VHDL硬件描述语言实现的对FPGA（Cyclone II）的配置的VHDL源代码。

--~VCC~0 is ~VCC~0 at LC61
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~VCC~1 is ~VCC~1 at LC62
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~VCC~2 is ~VCC~2 at LC57
~VCC~2_or_out = GND;
~VCC~2 = !(~VCC~2_or_out);


--A1L45 is restart_sequence~77bal at LC47
A1L45_p1_out = u5 & u6;
A1L45_p2_out = u5 & !u7;
A1L45_or_out = A1L45_p1_out # A1L45_p2_out;
A1L45 = !(A1L45_or_out);


--cpld_clkosc is cpld_clkosc at PIN_87
--operation mode is input

cpld_clkosc = INPUT();


--reset_n is reset_n at PIN_89
--operation mode is input

reset_n = INPUT();


--status_n is status_n at PIN_92
--operation mode is input

status_n = INPUT();


--D[7] is D[7] at PIN_80
--operation mode is input

D[7] = INPUT();


--D[6] is D[6] at PIN_79
--operation mode is input

D[6] = INPUT();


--D[5] is D[5] at PIN_78
--operation mode is input

D[5] = INPUT();


--D[4] is D[4] at PIN_77
--operation mode is input

D[4] = INPUT();


--D[3] is D[3] at PIN_76
--operation mode is input

D[3] = INPUT();


--D[2] is D[2] at PIN_75
--operation mode is input

D[2] = INPUT();


--D[1] is D[1] at PIN_72
--operation mode is input

D[1] = INPUT();


--D[0] is D[0] at PIN_71
--operation mode is input

D[0] = INPUT();


--config_done is config_done at PIN_85
--operation mode is input

config_done = INPUT();


--pld_msel1 is pld_msel1 at PIN_65
--operation mode is output

pld_msel1 = OUTPUT(~GND~0);


--flash_reset_n is flash_reset_n at PIN_61
--operation mode is output

flash_reset_n = OUTPUT(u5);


--config_n is config_n at PIN_98
--operation mode is output

config_n_open_drain_out = OPNDRN(u13);
config_n = OUTPUT(config_n_open_drain_out);


--error_led is error_led at PIN_70
--operation mode is output

error_led = OUTPUT(u8);


--pld_msel0 is pld_msel0 at PIN_64
--operation mode is output

pld_msel0 = OUTPUT(A1L64);


--user_led is user_led at PIN_67
--operation mode is output

user_led = OUTPUT(A1L17);


--flash_a22 is flash_a22 at PIN_29
--operation mode is output

flash_a22_tri_out = TRI(~VCC~0, A1L64);
flash_a22 = OUTPUT(flash_a22_tri_out);


--flash_a21 is flash_a21 at PIN_28
--operation mode is output

flash_a21_tri_out = TRI(~VCC~1, A1L64);
flash_a21 = OUTPUT(flash_a21_tri_out);


--flash_a20 is flash_a20 at PIN_27
--operation mode is output

flash_a20_tri_out = TRI(u6, A1L64);
flash_a20 = OUTPUT(flash_a20_tri_out);


--a[19] is a[19] at PIN_25
--operation mode is output

a[19]_tri_out = TRI(F2_dffs[19], A1L64);
a[19] = OUTPUT(a[19]_tri_out);


--a[18] is a[18] at PIN_24
--operation mode is output

a[18]_tri_out = TRI(F2_dffs[18], A1L64);
a[18] = OUTPUT(a[18]_tri_out);


--a[17] is a[17] at PIN_23
--operation mode is output

a[17]_tri_out = TRI(F2_dffs[17], A1L64);
a[17] = OUTPUT(a[17]_tri_out);


--a[16] is a[16] at PIN_22
--operation mode is output

a[16]_tri_out = TRI(F2_dffs[16], A1L64);
a[16] = OUTPUT(a[16]_tri_out);


--a[15] is a[15] at PIN_21
--operation mode is output

a[15]_tri_out = TRI(F2_dffs[15], A1L64);
a[15] = OUTPUT(a[15]_tri_out);


--a[14] is a[14] at PIN_20
--operation mode is output

a[14]_tri_out = TRI(F2_dffs[14], A1L64);
a[14] = OUTPUT(a[14]_tri_out);


--a[13] is a[13] at PIN_19
--operation mode is output

a[13]_tri_out = TRI(F2_dffs[13], A1L64);
a[13] = OUTPUT(a[13]_tri_out);


--a[12] is a[12] at PIN_17
--operation mode is output

a[12]_tri_out = TRI(F2_dffs[12], A1L64);
a[12] = OUTPUT(a[12]_tri_out);


--a[11] is a[11] at PIN_16
--operation mode is output

a[11]_tri_out = TRI(F2_dffs[11], A1L64);
a[11] = OUTPUT(a[11]_tri_out);


--a[10] is a[10] at PIN_14
--operation mode is output

a[10]_tri_out = TRI(F2_dffs[10], A1L64);
a[10] = OUTPUT(a[10]_tri_out);


--a[9] is a[9] at PIN_13
--operation mode is output

a[9]_tri_out = TRI(F2_dffs[9], A1L64);
a[9] = OUTPUT(a[9]_tri_out);


--a[8] is a[8] at PIN_12
--operation mode is output

a[8]_tri_out = TRI(F2_dffs[8], A1L64);
a[8] = OUTPUT(a[8]_tri_out);


--a[7] is a[7] at PIN_10
--operation mode is output

a[7]_tri_out = TRI(F2_dffs[7], A1L64);
a[7] = OUTPUT(a[7]_tri_out);


--a[6] is a[6] at PIN_9
--operation mode is output

a[6]_tri_out = TRI(F2_dffs[6], A1L64);
a[6] = OUTPUT(a[6]_tri_out);


--a[5] is a[5] at PIN_8
--operation mode is output

a[5]_tri_out = TRI(F2_dffs[5], A1L64);
a[5] = OUTPUT(a[5]_tri_out);


--a[4] is a[4] at PIN_7
--operation mode is output

a[4]_tri_out = TRI(F2_dffs[4], A1L64);
a[4] = OUTPUT(a[4]_tri_out);


--a[3] is a[3] at PIN_6
--operation mode is output

a[3]_tri_out = TRI(F2_dffs[3], A1L64);
a[3] = OUTPUT(a[3]_tri_out);


--a[2] is a[2] at PIN_5
--operation mode is output

a[2]_tri_out = TRI(F2_dffs[2], A1L64);
a[2] = OUTPUT(a[2]_tri_out);


--a[1] is a[1] at PIN_2
--operation mode is output

a[1]_tri_out = TRI(F2_dffs[1], A1L64);
a[1] = OUTPUT(a[1]_tri_out);


--a[0] is a[0] at PIN_1
--operation mode is output

a[0]_tri_out = TRI(F2_dffs[0], A1L64);
a[0] = OUTPUT(a[0]_tri_out);


--pld_data0 is pld_data0 at PIN_63
--operation mode is output

pld_data0_tri_out = TRI(A1L43, A1L64);
pld_data0 = OUTPUT(pld_data0_tri_out);


--DCLK is DCLK at PIN_97
--operation mode is output

DCLK_tri_out = TRI(A1L63, A1L64);
DCLK = OUTPUT(DCLK_tri_out);


--flash_rw_n is flash_rw_n at PIN_31
--operation mode is output

flash_rw_n_tri_out = TRI(~VCC~2, A1L64);
flash_rw_n = OUTPUT(flash_rw_n_tri_out);


--flash_cs_n is flash_cs_n at PIN_32
--operation mode is output

flash_cs_n_open_drain_out = OPNDRN(A1L74);
flash_cs_n = OUTPUT(flash_cs_n_open_drain_out);


--flash_oe_n is flash_oe_n at PIN_30
--operation mode is output

flash_oe_n_open_drain_out = OPNDRN(A1L84);
flash_oe_n = OUTPUT(flash_oe_n_open_drain_out);


--loading_led is loading_led at PIN_69
--operation mode is output

loading_led = OUTPUT(A1L94);