📄 it51_core.vhd
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if cInst_is_JNB then if Third_Cycle and (Bit_Pattern and Op_A) = "00000000" then NPC <= PC_Plus_cInst2; J_Skip <= true; end if; end if; if cInst_is_JZ then if Next_ACC_Z = '1' and Second_Cycle then NPC <= PC_Plus_cInst1; J_Skip <= true; end if; end if; if cInst_is_JNZ then if Next_ACC_Z = '0' and Second_Cycle then NPC <= PC_Plus_cInst1; J_Skip <= true; end if; end if; if cInst_is_SJMP then if Second_Cycle then NPC <= PC_Plus_cInst1; J_Skip <= true; end if; end if; if cInst_is_MOVC then if Second_Cycle then if cInst(4) = '0' then NPC <= ACC + OPC; else if DPS_SEL = '0' then NPC <= DPTR0_Plus_ACC; else NPC <= DPTR1_Plus_ACC; end if; end if; elsif Third_Cycle then NPC <= OPC; J_Skip <= true; end if; end if; if cInst_is_AJMP or cInst_is_ACALL then if Second_Cycle then NPC(15 downto 11) <= PC(15 downto 11); NPC(10 downto 8) <= cInst(7 downto 5); NPC( 7 downto 0) <= cInst1; J_Skip <= true; end if; end if; if cInst_is_LJMP or cInst_is_LCALL then if Second_Cycle then NPC(15 downto 8) <= cInst1; NPC( 7 downto 0) <= nInst; end if; end if; if cInst_is_JC then if Next_PSW7 = '1' and Second_Cycle then NPC <= PC_Plus_cInst1; J_Skip <= true; end if; end if; if cInst_is_JNC then if Next_PSW7 = '0' and Second_Cycle then NPC <= PC_Plus_cInst1; J_Skip <= true; end if; end if; if cInst_is_DIV then if PCPaused(3 downto 1) = "000" or Div_Rdy = '0' then PCPause <= true; NPC <= PC; end if; end if; if cInst_is_POP or cInst_is_PUSH then if First_Cycle and PCPaused(0) = '0' then PCPause <= true; NPC <= PC; end if; end if; if cInst_is_RET or cInst_is_RETI then J_Skip <= true; if First_Cycle and PCPaused(0) = '0' then PCPause <= true; NPC <= PC; end if; end if;--- end if; end process; ---------------------------------------------------------------------------- -- Rst_r_n, RET_r process (Rst_n, Clk) begin if Rst_n = '0' then Rst_r_n <= '0'; RET_r <= '0'; elsif Clk'event and Clk = '1' then Rst_r_n <= '1'; if Ready then if cInst_is_RET or cInst_is_RETI then RET_r <= '1'; else RET_r <= '0'; end if; end if; end if; end process; ---------------------------------------------------------------------------- -- Current Instruction process (Rst_n, Clk) begin if Rst_n = '0' then cInst <= (others => '0'); -- Force NOP at reset. cInst1 <= (others => '0'); cInst2 <= (others => '0'); cInst_MCode <= "000000001"; -- Current Instructure is NOP <= true; cInst_is_RET <= false; cInst_is_RETI <= false; cInst_is_PUSH <= false; cInst_is_POP <= false; cInst_is_ACALL <= false; cInst_is_LCALL <= false; cInst_is_Ri <= false; cInst_is_Rn <= false; cInst_is_A_Write <= false; cInst_is_IW <= false; cInst_is_DW <= false; cInst_is_DR <= false; cInst_is_MOVX_Write <= false; cInst_is_MOVX_Read <= false; cInst_is_DIV <= false; cInst_is_MUL <= false; cInst_is_MOVC <= false; cInst_is_INC_DPTR <= false; cInst_is_JC <= false; cInst_is_JNC <= false; cInst_is_JZ <= false; cInst_is_JNZ <= false; cInst_is_SJMP <= false; cInst_is_AJMP <= false; cInst_is_LJMP <= false; cInst_is_JB <= false; cInst_is_JNB <= false; cInst_is_JBC <= false; cInst_is_CJNE <= false; cInst_is_DJNE <= false; cInst_is_DJNZ <= false; cInst_is_JMP_A_DPTR <= false; cInst_is_x3 <= false; cInst_is_x5 <= false; cInst_is_7x <= false; cInst_is_8x <= false; cInst_is_Ax <= false; elsif Clk'event and Clk = '1' then if not Ready then null; elsif PCPause and not cInst_is_PUSH then null; elsif Rst_r_n = '0' or Inst_Skip or IStart or Ri_Stall or PSW_Stall or RW_Stall then -- Skip/Stall/Flush: NOP insertion cInst <= (others => '0'); cInst_MCode <= "000000001"; -- Current Instructure is NOP <= true; cInst_is_RET <= false; cInst_is_RETI <= false; cInst_is_PUSH <= false; cInst_is_POP <= false; cInst_is_ACALL <= false; cInst_is_LCALL <= false; cInst_is_Ri <= false; cInst_is_Rn <= false; cInst_is_A_Write <= false; cInst_is_IW <= false; cInst_is_DW <= false; cInst_is_DR <= false; cInst_is_MOVX_Write <= false; cInst_is_MOVX_Read <= false; cInst_is_DIV <= false; cInst_is_MUL <= false; cInst_is_MOVC <= false; cInst_is_INC_DPTR <= false; cInst_is_JC <= false; cInst_is_JNC <= false; cInst_is_JZ <= false; cInst_is_JNZ <= false; cInst_is_SJMP <= false; cInst_is_AJMP <= false; cInst_is_LJMP <= false; cInst_is_JB <= false; cInst_is_JNB <= false; cInst_is_JBC <= false; cInst_is_CJNE <= false; cInst_is_DJNE <= false; cInst_is_DJNZ <= false; cInst_is_JMP_A_DPTR <= false; cInst_is_x3 <= false; cInst_is_x5 <= false; cInst_is_7x <= false; cInst_is_8x <= false; cInst_is_Ax <= false; else if Last_Cycle then cInst <= nInst; cInst_MCode <= nInst_MCode; -- Current Instructure is NOP <= (nInst = "00000000"); cInst_is_RET <= (nInst = "00100010"); cInst_is_RETI <= (nInst = "00110010"); cInst_is_PUSH <= (nInst = "11000000"); cInst_is_POP <= (nInst = "11010000"); cInst_is_ACALL <= (nInst(4 downto 0) = "10001"); cInst_is_LCALL <= (nInst = "00010010"); cInst_is_Ri <= (nInst_MCode(7) = '1'); cInst_is_Rn <= (nInst_MCode(8) = '1'); cInst_is_A_Write <= (nInst_MCode(2) = '1'); cInst_is_IW <= (nInst_MCode(4) = '1'); cInst_is_DW <= (nInst_MCode(6) = '1'); cInst_is_DR <= (nInst_MCode(5) = '1'); cInst_is_MOVX_Write <= (nInst(7 downto 2) = "111100" and nInst(1 downto 0) /= "01"); cInst_is_MOVX_Read <= (nInst(7 downto 2) = "111000" and nInst(1 downto 0) /= "01"); cInst_is_DIV <= (nInst = "10000100"); cInst_is_MUL <= (nInst = "10100100"); cInst_is_MOVC <= (nInst(7 downto 5) = "100" and nInst(3 downto 0) = "0011"); cInst_is_INC_DPTR <= (nInst = "10100011"); cInst_is_JC <= (nInst = "01000000"); cInst_is_JNC <= (nInst = "01010000"); cInst_is_JZ <= (nInst = "01100000"); cInst_is_JNZ <= (nInst = "01110000"); cInst_is_SJMP <= (nInst = "10000000"); cInst_is_AJMP <= (nInst(4 downto 0) = "00001"); cInst_is_LJMP <= (nInst = "00000010"); cInst_is_JB <= (nInst = "00100000"); cInst_is_JNB <= (nInst = "00110000"); cInst_is_JBC <= (nInst = "00010000"); cInst_is_CJNE <= (nInst(7 downto 4) = "1011" and nInst(3 downto 2) /= "00"); cInst_is_DJNZ <= (nInst(7 downto 3) = "11011"); cInst_is_DJNE <= (nInst = "11010101"); cInst_is_JMP_A_DPTR <= (nInst = "01110011"); cInst_is_x3 <= (nInst(3 downto 0) = "0011"); cInst_is_x5 <= (nInst(3 downto 0) = "0101"); cInst_is_7x <= (nInst(7 downto 4) = "0111"); cInst_is_8x <= (nInst(7 downto 4) = "1000"); cInst_is_Ax <= (nInst(7 downto 4) = "1010"); elsif First_Cycle then cInst1 <= nInst; elsif Second_Cycle then cInst2 <= nInst; end if; end if; end if; end process; ---------------------------------------------------------------------------- -- Bit_Pattern process (Rst_n, Clk) begin if Rst_n = '0' then Bit_Pattern <= "00000000"; elsif Clk'event and Clk = '1' then if First_Cycle then case nInst_Rn_Index is when "000" => Bit_Pattern <= "00000001"; when "001" => Bit_Pattern <= "00000010"; when "010" => Bit_Pattern <= "00000100"; when "011" => Bit_Pattern <= "00001000"; when "100" => Bit_Pattern <= "00010000"; when "101" => Bit_Pattern <= "00100000"; when "110" => Bit_Pattern <= "01000000"; when others => Bit_Pattern <= "10000000"; end case; end if; end if; end process; ---------------------------------------------------------------------------- -- Stall Inst_Skip <= (RET_r='1') or J_Skip; Ri_Stall <= true when not NOP and Last_Cycle and not PCPause and nInst_is_Ri and cInst_is_DW else false; PSW_Stall <= true when ( not NOP and Last_Cycle and cInst_is_DW and (nInst_is_Ri or nInst_is_Rn) and Int_AddrA = "11010000") or ( cInst_is_DIV and not PCPause) else false; RW_Stall <= true when not NOP and Last_Cycle and --not PCPause and ( (Mem_Wr_p = '1' and ( nInst_is_Ri or nInst_is_RET or nInst_is_RETI or nInst_is_DR )) or (SFR_Wr_p = '1' and nInst_is_DR) or cInst_is_MUL ) else false; ---------------------------------------------------------------------------- -- SFR Access SFR_Rd <= SFR_Rd_i; SFR_Wr <= SFR_Wr_i; SFR_Addr <= Int_AddrA_r(6 downto 0) when SFR_Wr_i = '1' else Int_AddrA(6 downto 0); SFR_WData <= Res_Bus; process (Int_AddrA, IP, DPTR0, DPTR1, DPS, PSW, PSW0, ACC, EIP, B, SP, SFR_RData_Ext, CKCON, MPAGE) begin case Int_AddrA is when "10111000" => SFR_RData <= IP; when "10000010" => SFR_RData <= DPL0; -- 82 when "10000011" => SFR_RData <= DPH0; -- 83 when "10000100" => SFR_RData <= DPL1; -- 84 when "10000101" => SFR_RData <= DPH1; -- 85 when "10000110" => SFR_RData <= DPS; -- 86⌨️ 快捷键说明
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