📄 ir_decoder_spec.vhd
字号:
---------------------------------------------------- Model : 8051 Behavioral Model,-- VHDL Entity mc8051.ir_decoder.interface---- Author : Michael Mayer (mrmayer@computer.org),-- Dr. Hardy J. Pottinger,-- Department of Electrical Engineering-- University of Missouri - Rolla---- Created at : 09/19/98 20:02:06--LIBRARY ieee ;USE ieee.std_logic_1164.all;USE ieee.numeric_std.all;LIBRARY mc8051 ;USE mc8051.cpu_pack.all;USE mc8051.synth_pack.all;ENTITY ir_decoder IS PORT( alu_second_result : IN std_logic ; cpu_rst : IN std_logic ; cy : IN std_logic ; int_clk : IN std_logic ; ir : IN std_logic_vector( 7 DOWNTO 0 ) ; new_ir : IN std_logic ; alu_cmd : OUT std_logic_vector( 3 DOWNTO 0 ) ; data_alu : OUT std_logic_vector( 2 DOWNTO 0 ) ; data_dest : OUT std_logic_vector( 2 DOWNTO 0 ) ; data_t1 : OUT std_logic_vector( 2 DOWNTO 0 ) ; data_t2 : OUT std_logic_vector( 2 DOWNTO 0 ) ; dest_cmd : OUT std_logic_vector( 3 DOWNTO 0 ) ; read_latch : OUT std_logic ; set_ac_ov : OUT std_logic ; set_cy : OUT std_logic ; t1_cmd : OUT std_logic_vector( 3 DOWNTO 0 ) ; t2_cmd : OUT std_logic_vector( 3 DOWNTO 0 ) ; two_dests : OUT std_logic ; use_acc_0 : OUT std_logic ; use_cy : OUT std_logic );-- DeclarationsEND ir_decoder ;---- VHDL Architecture mc8051.ir_decoder.spec---- Created:-- by - mrmayer.UNKNOWN (eceultra20.ece.umr.edu)-- at - 23:24:26 09/02/98---- Generated by Mentor Graphics' Renoir(TM) 3.0 (Build 110)--architecture spec of ir_decoder is SIGNAL cy_int : std_logic; SIGNAL ir_10 : bit_vector(7 DOWNTO 0);BEGIN--t1, t2, alu, and dest each get 4 bits of cmd + 3 bits of data.--this means we need a 8bit (opcode) to 16 bit (4x4 cmds) converter--and then driver for the 12 bits (4x3) of data-- latch with new_ircy_int <= cy WHEN new_ir = '1' ELSE cy_int;ir_10 <= To_bitvector (ir);read_latch <= '0'; -- ALL ARE CONSIDERED READ PINS!!!p1 : PROCESS (int_clk) ISBEGINtwo_dests <= '0';CASE ir_10 IS WHEN "00000000" | "10100101" => --NOP, reserved t1_cmd <= zeros; data_t1 <= "000"; t2_cmd <= zeros; data_t2 <= "000"; alu_cmd <= pass_tmp1; dest_cmd <= nothing; WHEN "00000001" | "00100001" | "01000001" | "01100001" | "10000001" | "10100001" | "11000001" | "11100001" | -- AJMP "00010001" | "00110001" | "01010001" | "01110001" | "10010001" | "10110001" | "11010001" | "11110001" | -- ACALL "00000010" | "00010010" | "00100010" | "00110010" => -- LJMP, LCALL, RET, RETI t1_cmd <= nothing; t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= "000"; dest_cmd <= nothing; -- pass result to data_gb WHEN "11000000" => -- PUSH C0 t1_cmd <= direct_T; data_t1 <= "001"; t2_cmd <= zeros; alu_cmd <= pass_tmp1; dest_cmd <= wr_at_sp; WHEN "11010000" => -- POP D0 t1_cmd <= rd_at_sp; t2_cmd <= zeros; alu_cmd <= pass_tmp1; data_alu <= "000"; dest_cmd <= direct_T; data_dest <= "001"; WHEN "00000011" => -- RR (03) t1_cmd <= nothing; t2_cmd <= use_acc; alu_cmd <= rotate; data_alu <= rr_instr; use_cy <= '0'; dest_cmd <= use_acc; WHEN "00010011" => -- RRC (13) t1_cmd <= nothing; t2_cmd <= use_acc; alu_cmd <= rotate; data_alu <= rr_instr; use_cy <= '1'; dest_cmd <= use_acc; WHEN "00100011" => -- RL (23) t1_cmd <= nothing; t2_cmd <= use_acc; alu_cmd <= rotate; data_alu <= rl_instr; use_cy <= '0'; dest_cmd <= use_acc; WHEN "00110011" => -- RLC (33) t1_cmd <= nothing; t2_cmd <= use_acc; alu_cmd <= rotate; data_alu <= rl_instr; use_cy <= '1'; dest_cmd <= use_acc; WHEN "00000100" => -- INC A "04" t1_cmd <= use_acc; t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_inc; dest_cmd <= use_acc; WHEN "00000101" => -- INC direct_T "05" t1_cmd <= direct_T; data_t1 <= "001"; -- use byte 1 t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_inc; --dest_cmd <= direct_T; data_dest <= "001"; dest_cmd <= same_as_t1; read_latch <= '1'; WHEN "00000110" | "00000111" => -- INC @Ri "06" - "07" t1_cmd <= indirect_T; data_t1 <= "00"&ir(0); t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_inc; --dest_cmd <= indirect_T; data_dest <= "00"&ir(0); dest_cmd <= same_as_t1; read_latch <= '1'; WHEN "00001000" | "00001001" | "00001010" | "00001011" | "00001100" | "00001101" | "00001110" | "00001111" => -- INC Rn 08-0F t1_cmd <= use_reg; data_t1 <= ir(2 DOWNTO 0); t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_inc; --dest_cmd <= use_reg; data_dest <= ir(2 DOWNTO 0); dest_cmd <= same_as_t1; WHEN "00010100" => -- DEC A "14" t1_cmd <= use_acc; t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_dec; dest_cmd <= use_acc; WHEN "00010101" => -- DEC direct_T "15" t1_cmd <= direct_T; data_t2 <= "001"; -- use byte 1 t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_dec; --dest_cmd <= direct_T; data_dest <= "001"; dest_cmd <= same_as_t1; read_latch <= '1'; WHEN "00010110" | "00010111" => -- DEC @Ri "16" - "17" t1_cmd <= indirect_T; data_t2 <= "00"&ir(0); t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_dec; --dest_cmd <= indirect_T; data_dest <= "00"&ir(0); dest_cmd <= same_as_t1; read_latch <= '1'; WHEN "00011000" | "00011001" | "00011010" | "00011011" | "00011100" | "00011101" | "00011110" | "00011111" => -- DEC Rn 18-1F t1_cmd <= use_reg; data_t2 <= ir(2 DOWNTO 0); t2_cmd <= nothing; alu_cmd <= pass_tmp1; data_alu <= t1_dec; --dest_cmd <= use_reg; data_dest <= ir(2 DOWNTO 0); dest_cmd <= same_as_t1; WHEN "00100100" => -- ADD A,#data "24" t1_cmd <= immed; data_t1 <= "001" ; t2_cmd <= use_acc; alu_cmd <= add_instr; data_alu <= "000"; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "00100101" => -- ADD A,direct_T "25" t1_cmd <= direct_T; data_t1 <= "001"; -- use byte t2_cmd <= use_acc; alu_cmd <= add_instr; data_alu <= "000"; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "00100110" | "00100111" => -- ADD A,@Ri "26" - "27" t1_cmd <= indirect_T; data_t1 <= "00"&ir(0); t2_cmd <= use_acc; alu_cmd <= add_instr; data_alu <= "000"; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "00101000" | "00101001" | "00101010" | "00101011" | "00101100" | "00101101" | "00101110" | "00101111" => -- ADD A,Rn 28-2F t1_cmd <= use_reg; data_t1 <= ir(2 DOWNTO 0); t2_cmd <= use_acc; alu_cmd <= add_instr; data_alu <= "000"; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "00110100" => -- ADDC #data "34" t1_cmd <= immed; data_t1 <= "001" ; t2_cmd <= use_acc; alu_cmd <= add_instr; IF cy_int = '1' THEN data_alu <= t1_inc; ELSE data_alu <= "000"; END IF; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "00110101" => -- ADDC direct_T "35" t1_cmd <= direct_T; data_t1 <= "001"; -- use byte t2_cmd <= use_acc; alu_cmd <= add_instr; IF cy_int = '1' THEN data_alu <= t1_inc; ELSE data_alu <= "000"; END IF; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "00110110" | "00110111" => -- ADDC @Ri "36" - "37" t1_cmd <= indirect_T; data_t1 <= "00"&ir(0); t2_cmd <= use_acc; alu_cmd <= add_instr; IF cy_int = '1' THEN data_alu <= t1_inc; ELSE data_alu <= "000"; END IF; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "00111000" | "00111001" | "00111010" | "00111011" | "00111100" | "00111101" | "00111110" | "00111111" => -- ADDC Rn 38-3F t1_cmd <= use_reg; data_t1 <= ir(2 DOWNTO 0); t2_cmd <= use_acc; alu_cmd <= add_instr; IF cy_int = '1' THEN data_alu <= t1_inc; ELSE data_alu <= "000"; END IF; set_cy <= '1'; set_ac_ov <= '1'; dest_cmd <= use_acc; WHEN "01000010" => -- ORL direct_T,A "42" t1_cmd <= direct_T; data_t1 <= "001" ; t2_cmd <= use_acc; alu_cmd <= logic; data_alu <= orl_instr; dest_cmd <= same_as_t1; read_latch <= '1'; WHEN "01000011" => -- ORL direct_T,#data "43" t1_cmd <= immed; data_t1 <= "010" ; t2_cmd <= direct_T; data_t1 <= "001"; alu_cmd <= logic; data_alu <= orl_instr; dest_cmd <= same_as_t1; read_latch <= '1'; WHEN "01000100" => -- ORL A, #data "44" t1_cmd <= immed; data_t1 <= "001" ; t2_cmd <= use_acc; alu_cmd <= logic; data_alu <= orl_instr; dest_cmd <= use_acc; WHEN "01000101" => -- ORL A,direct_T "45" t1_cmd <= direct_T; data_t1 <= "001"; -- use byte t2_cmd <= use_acc; alu_cmd <= logic; data_alu <= orl_instr; dest_cmd <= use_acc;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -