execute.vhd

vhdl语言编程软件应用于学习教程。适合于初学者进行vhdl语言的学习。

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use work.pipeline_pkg.all;

entity execute_ent is
    port (
          d_cmd : in command_type;
          d_src1_data : in std_logic_vector(31 downto 0);
          d_src2_data : in std_logic_vector(31 downto 0);
          d_dest : in register_type;
          d_src1 : in register_type;
          d_src2 : in register_type;
          d_data : in std_logic_vector(31 downto 0);
          clk : in std_logic;
          flush : out std_logic;
          jump : out std_logic;
          ex_data : out std_logic_vector(31 downto 0);
          ex_dest : out register_type;
          ex_store : out std_logic;
          outp : out std_logic_vector(31 downto 0)
         );
end execute_ent;

architecture execute_arch of execute_ent is
    signal int_ex_dest : register_type := reg0;
    signal int_ex_data : std_logic_vector(31 downto 0);
    signal int_d_src1_data : std_logic_vector(31 downto 0);
    signal int_d_src2_data : std_logic_vector(31 downto 0);
   
begin

----this process fulfill bypass logic function

    process(d_cmd, int_ex_dest, d_src1, d_src2, int_d_src1_data, 
            int_d_src2_data, d_src1_data, d_src2_data, int_ex_data)
    begin
        if (d_cmd = LOAD or d_cmd = MOVE or d_cmd = NOP) then
            int_d_src1_data <= d_src1_data;
            int_d_src2_data <= d_src2_data;
        else
            if (int_ex_dest = d_src1) then
                int_d_src1_data <= int_ex_data;
                int_d_src2_data <= d_src2_data;
            elsif (int_ex_dest = d_src2) then
                int_d_src2_data <= int_ex_data;
                int_d_src1_data <= d_src1_data;
            else
                int_d_src1_data <= d_src1_data;
                int_d_src2_data <= d_src2_data;
            end if;
        end if;
    end process;

    process(clk, d_cmd, int_d_src1_data, int_d_src2_data, 
            d_dest, d_src1, d_src2, int_ex_data, d_data)
    begin
        if (clk'event and clk = '1') then
            case d_cmd is
                when MOVE =>
                    int_ex_data <= int_d_src1_data;
                    int_ex_dest <= d_dest;
                    ex_store <= '1';
                    jump <= '0';
                    outp <= ZERO;
                    flush <= '0';
                when ADD =>

----both MSB of src1 and src2 cannot be '1'. if it is then overflow.

                    int_ex_data <= signed(int_d_src1_data) + 
                                   signed(int_d_src2_data);
                    int_ex_dest <= d_dest;
                    ex_store <= '1';
                    jump <= '0';
                    outp <= ZERO;
                    flush <= '0';
                when SUB =>
                    int_ex_data <= signed(int_d_src1_data) - 
                                   signed(int_d_src2_data);
                    int_ex_dest <= d_dest;
                    ex_store <= '1';
                    jump <= '0';
                    outp <= ZERO;
                    flush <= '0';
                when MUL =>

----both src1 and src2 must be max 16 bits long,
----if not will overflow 
----excess of 16 bits is truncated

                    int_ex_data <= signed(int_d_src1_data(15 downto 0)) * 
                                   signed(int_d_src2_data(15 downto 0));
                    int_ex_dest <= d_dest;
                    ex_store <= '1';
                    jump <= '0';
                    outp <= ZERO;
                    flush <= '0';
                when CJE =>
                    if (int_d_src1_data = int_d_src2_data) then
                        jump <= '1';
                        flush <= '1';
                    else
                        jump <= '0';
                        flush <= '0';
                    end if;
                    ex_store <= '0';
                    outp <= ZERO;
                when LOAD =>
                    int_ex_dest <= d_dest;
                    int_ex_data <= d_data;
                    ex_store <= '1';
                    outp <= ZERO;
                    jump <= '0';
                    flush <= '0';
                when READ =>
                    outp <= int_d_src1_data;
                    ex_store <= '0';
                    jump <= '0';
                    flush <= '0';
                when NOP =>
                    outp <= ZERO;
                    flush <= '0';
                    jump <= '0';
                    ex_store <= '0';
                when others => NULL;
            end case;
        end if;
    end process;
    ex_data <= int_ex_data;
    ex_dest <= int_ex_dest;
end execute_arch;