arm.c

用VHDL语言实现的ARM处理器的标准内核的源代码程序

typedef struct _proc_state {} proc_state;
typedef struct _insn_dp_i_s_struct {
/*Data Processing immidiate shieft*/
  int (*func) (struct _insn_dp_i_s_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int op1: 5; /*Data processing opcode*/
  unsigned int dps: 2; /*Update cpsr*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int sha: 6; /*Shieft amount*/
  unsigned int sh: 3; /*Shieft direction*/
  unsigned int rm: 5; /*Register rm*/
} insn_dp_i_s_struct;
typedef struct _insn_msr_struct {
/*Move status register to register*/
  int (*func) (struct _insn_msr_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int R: 2; /*Cpsr|Spsr '1'=Spsr*/
  unsigned int SBO: 5; /**/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int SBZ: 5; /**/
  unsigned int SBZ2: 5; /**/
} insn_msr_struct;
typedef struct _insn_mrs_struct {
/*Move register to status register*/
  int (*func) (struct _insn_mrs_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int R: 2; /*Cpsr|Spsr '1'=Spsr*/
  unsigned int msk: 5; /**/
  unsigned int SBO: 5; /**/
  unsigned int SBZ: 5; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_mrs_struct;
typedef struct _insn_bex_struct {
/*Branch / exchange*/
  int (*func) (struct _insn_bex_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int SBO: 13; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_bex_struct;
typedef struct _insn_clz_struct {
/*Count leading zero*/
  int (*func) (struct _insn_clz_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int SBO: 5; /**/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int SBO2: 5; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_clz_struct;
typedef struct _insn_blx_struct {
/*Branch and link /exchange*/
  int (*func) (struct _insn_blx_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int SBO: 13; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_blx_struct;
typedef struct _insn_dsa_struct {
/*Dsp add|sub*/
  int (*func) (struct _insn_dsa_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int dsop: 3; /*Dsp operand*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int SBZ: 5; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_dsa_struct;
typedef struct _insn_brk_struct {
/*Breakpoint*/
  int (*func) (struct _insn_brk_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int imm: 13; /*Breakpoint imm part1*/
  unsigned int imm2: 5; /*Breakpoint imm part2*/
} insn_brk_struct;
typedef struct _insn_dsm_struct {
/*DSP multiply*/
  int (*func) (struct _insn_dsm_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int dsop: 3; /*Dsp operand*/
  unsigned int RD: 5; /**/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rs: 5; /*Register rs*/
  unsigned int y: 2; /**/
  unsigned int x: 2; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_dsm_struct;
typedef struct _insn_dp_r_s_struct {
/*Data processing register shieft*/
  int (*func) (struct _insn_dp_r_s_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int op1: 5; /*Data processing opcode*/
  unsigned int dps: 2; /*Update cpsr*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int rs: 5; /*Register rs*/
  unsigned int sh: 3; /*Shieft direction*/
  unsigned int rm: 5; /*Register rm*/
} insn_dp_r_s_struct;
typedef struct _insn_mula_struct {
/*Multiply and accumulate*/
  int (*func) (struct _insn_mula_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int MA: 2; /*Multiply accumulate*/
  unsigned int MS: 2; /*Set cpsr*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rs: 5; /*Register rs*/
  unsigned int rm: 5; /*Register rm*/
} insn_mula_struct;
typedef struct _insn_mull_struct {
/*Multiply long*/
  int (*func) (struct _insn_mull_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int MU: 2; /*Multiply unsigned*/
  unsigned int MA: 2; /*Multiply accumulate*/
  unsigned int MS: 2; /*Set cpsr*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int rdl: 5; /*Destination register long*/
  unsigned int rs: 5; /*Register rs*/
  unsigned int rm: 5; /*Register rm*/
} insn_mull_struct;
typedef struct _insn_swp_struct {
/*Swap|swap byte*/
  int (*func) (struct _insn_swp_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int SB: 2; /*Swap byte*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int sbz: 5; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_swp_struct;
typedef struct _insn_ld1_struct {
/*Load|Store halfword*/
  int (*func) (struct _insn_ld1_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int LSL: 2; /*Load|Store '1'=Load*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int sbz: 5; /**/
  unsigned int rm: 5; /*Register rm*/
} insn_ld1_struct;
typedef struct _insn_ld2_struct {
/*Load|Store halfword immidiate offset*/
  int (*func) (struct _insn_ld2_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int LSL: 2; /*Load|Store '1'=Load*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int i81: 5; /*Immidiate8 part1*/
  unsigned int i82: 5; /*Immidiate8 part2*/
} insn_ld2_struct;
typedef struct _insn_ld3_struct {
/*Load|Store two words register offset*/
  int (*func) (struct _insn_ld3_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int i81: 5; /*Immidiate8 part1*/
  unsigned int S: 2; /*Signed|Unsigned '1'=signed*/
  unsigned int i82: 5; /*Immidiate8 part2*/
} insn_ld3_struct;
typedef struct _insn_ld4_struct {
/*Load|Store signed halfword/byte register offset*/
  int (*func) (struct _insn_ld4_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int i81: 5; /*Immidiate8 part1*/
  unsigned int H: 2; /*halfword|signedbyte '1'=halfword*/
  unsigned int i82: 5; /*Immidiate8 part2*/
} insn_ld4_struct;
typedef struct _insn_ld5_struct {
/*Load|Store two words register offset*/
  int (*func) (struct _insn_ld5_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int i81: 5; /*Immidiate8 part1*/
  unsigned int S: 2; /*Signed|Unsigned '1'=signed*/
  unsigned int i82: 5; /*Immidiate8 part2*/
} insn_ld5_struct;
typedef struct _insn_ld6_struct {
/*Load|Store signed halfword/byte immidiate offset*/
  int (*func) (struct _insn_ld6_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int i81: 5; /*Immidiate8 part1*/
  unsigned int H: 2; /*halfword|signedbyte '1'=halfword*/
  unsigned int i82: 5; /*Immidiate8 part2*/
} insn_ld6_struct;
typedef struct _insn_dp_i_struct {
/*Data processing immidiate*/
  int (*func) (struct _insn_dp_i_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int op1: 5; /*Data processing opcode*/
  unsigned int dps: 2; /*Update cpsr*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int rot: 5; /*Immidiate8 rotate*/
  unsigned int dpi: 9; /*Immidiate8*/
} insn_dp_i_struct;
typedef struct _insn_undef1_struct {
/*Undefined instruction*/
  int (*func) (struct _insn_undef1_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int X2: 2; /**/
  unsigned int X: 21; /**/
} insn_undef1_struct;
typedef struct _insn_misr_struct {
/*Move immidiate to status register*/
  int (*func) (struct _insn_misr_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int R: 2; /*Cpsr|Spsr '1'=Spsr*/
  unsigned int MSK: 5; /*move immidiate to status register mask*/
  unsigned int SBQ: 5; /**/
  unsigned int rot: 5; /*Immidiate8 rotate*/
  unsigned int dpi: 9; /*Immidiate8*/
} insn_misr_struct;
typedef struct _insn_lsio_struct {
/*Load|Store imidiate offset*/
  int (*func) (struct _insn_lsio_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSB: 2; /*Byte|word '1'=byte*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int LSL: 2; /*Load|Store '1'=Load*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int LSI: 13; /**/
} insn_lsio_struct;
typedef struct _insn_lsro_struct {
/*Load|Store register offset*/
  int (*func) (struct _insn_lsro_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LSB: 2; /*Byte|word '1'=byte*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int LSL: 2; /*Load|Store '1'=Load*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int sha: 6; /*Shieft amount*/
  unsigned int sh: 3; /*Shieft direction*/
  unsigned int rm: 5; /*Register rm*/
} insn_lsro_struct;
typedef struct _insn_undef2_struct {
/*Undefined instruction2*/
  int (*func) (struct _insn_undef2_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int X: 21; /**/
  unsigned int X2: 5; /**/
} insn_undef2_struct;
typedef struct _insn_undef3_struct {
/*Undefined instruction3*/
  int (*func) (struct _insn_undef3_struct *s, proc_state *state);
  unsigned int X: 28; /**/
} insn_undef3_struct;
typedef struct _insn_lsm_struct {
/*Load|Store multiple*/
  int (*func) (struct _insn_lsm_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int LMS: 2; /*Set cpsr fro spsr*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int LSL: 2; /*Load|Store '1'=Load*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int rgl: 17; /*register list*/
} insn_lsm_struct;
typedef struct _insn_undef4_struct {
/*Undefined instruction4*/
  int (*func) (struct _insn_undef4_struct *s, proc_state *state);
  unsigned int X: 26; /**/
} insn_undef4_struct;
typedef struct _insn_bwl_struct {
/*Branch with link*/
  int (*func) (struct _insn_bwl_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int BLL: 2; /*Link*/
  unsigned int blo: 25; /**/
} insn_bwl_struct;
typedef struct _insn_bwlth_struct {
/*Branch with link and change to thumb*/
  int (*func) (struct _insn_bwlth_struct *s, proc_state *state);
  unsigned int BLH: 2; /*Exchange*/
  unsigned int blo: 25; /**/
} insn_bwlth_struct;
typedef struct _insn_cpldst_struct {
/*Coprocessor Load Store*/
  int (*func) (struct _insn_cpldst_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int LSP: 2; /*pre-indexed*/
  unsigned int LSU: 2; /*add/sub base '1'=add*/
  unsigned int Cp_N: 2; /*Coprocessor n bit*/
  unsigned int LSW: 2; /*writeback*/
  unsigned int LSL: 2; /*Load|Store '1'=Load*/
  unsigned int rn: 5; /*Register rn*/
  unsigned int crd: 5; /*Coprocessor destination register*/
  unsigned int cpn: 5; /*Coprocessor number*/
  unsigned int of8: 9; /*offset8*/
} insn_cpldst_struct;
typedef struct _insn_cpdp_struct {
/*Coprocessor data processing*/
  int (*func) (struct _insn_cpdp_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int co1: 5; /*Coprocessor op1*/
  unsigned int crn: 5; /*Coprocessor register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int cpn: 5; /*Coprocessor number*/
  unsigned int cp1: 4; /**/
  unsigned int crm: 5; /*Coprocessor register rm*/
} insn_cpdp_struct;
typedef struct _insn_cpr_struct {
/*Coprocessor register transfer*/
  int (*func) (struct _insn_cpr_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int co1: 4; /*Coprocessor op1*/
  unsigned int LSL: 2; /*Load|Store '1'=Load*/
  unsigned int crn: 5; /*Coprocessor register rn*/
  unsigned int rd: 5; /*Destination register rd*/
  unsigned int cpn: 5; /*Coprocessor number*/
  unsigned int cp1: 4; /**/
  unsigned int crm: 5; /*Coprocessor register rm*/
} insn_cpr_struct;
typedef struct _insn_swi_struct {
/*Software interrupt*/
  int (*func) (struct _insn_swi_struct *s, proc_state *state);
  unsigned int c: 5; /*Condition code*/
  unsigned int X: 25; /**/
} insn_swi_struct;
typedef struct _insn_undef_struct {
/*Undef*/
  int (*func) (struct _insn_undef_struct *s, proc_state *state);
  unsigned int X: 25; /**/
} insn_undef_struct;
typedef union _insn_union {
  insn_dp_i_s_struct insn_dp_i_s;
  insn_msr_struct insn_msr;
  insn_mrs_struct insn_mrs;
  insn_bex_struct insn_bex;
  insn_clz_struct insn_clz;
  insn_blx_struct insn_blx;
  insn_dsa_struct insn_dsa;
  insn_brk_struct insn_brk;
  insn_dsm_struct insn_dsm;
  insn_dp_r_s_struct insn_dp_r_s;
  insn_mula_struct insn_mula;
  insn_mull_struct insn_mull;
  insn_swp_struct insn_swp;
  insn_ld1_struct insn_ld1;
  insn_ld2_struct insn_ld2;
  insn_ld3_struct insn_ld3;
  insn_ld4_struct insn_ld4;
  insn_ld5_struct insn_ld5;
  insn_ld6_struct insn_ld6;
  insn_dp_i_struct insn_dp_i;
  insn_undef1_struct insn_undef1;
  insn_misr_struct insn_misr;
  insn_lsio_struct insn_lsio;
  insn_lsro_struct insn_lsro;
  insn_undef2_struct insn_undef2;
  insn_undef3_struct insn_undef3;
  insn_lsm_struct insn_lsm;
  insn_undef4_struct insn_undef4;
  insn_bwl_struct insn_bwl;
  insn_bwlth_struct insn_bwlth;
  insn_cpldst_struct insn_cpldst;
  insn_cpdp_struct insn_cpdp;
  insn_cpr_struct insn_cpr;
  insn_swi_struct insn_swi;
  insn_undef_struct insn_undef;
} insn_union;
 int func_insn_dp_i_s (struct _insn_dp_i_s_struct *s, proc_state *state) {
/*Data Processing immidiate shieft*/
};
int func_insn_msr (struct _insn_msr_struct *s, proc_state *state) {
/*Move status register to register*/
};
int func_insn_mrs (struct _insn_mrs_struct *s, proc_state *state) {
/*Move register to status register*/
};
int func_insn_bex (struct _insn_bex_struct *s, proc_state *state) {
/*Branch / exchange*/
};
int func_insn_clz (struct _insn_clz_struct *s, proc_state *state) {
/*Count leading zero*/
};