iicrd_hier_info

用FPGA实现IIC通讯的主控端

|iicrd
reset_1 => i~0.IN0
reset_1 => i~156.OUTPUTSELECT
reset_1 => i~157.OUTPUTSELECT
reset_1 => i~158.OUTPUTSELECT
reset_1 => i~159.OUTPUTSELECT
reset_1 => i~160.OUTPUTSELECT
reset_1 => i~161.OUTPUTSELECT
reset_1 => i~162.OUTPUTSELECT
reset_1 => i~163.OUTPUTSELECT
reset_1 => i~164.OUTPUTSELECT
reset_1 => i~165.OUTPUTSELECT
reset_1 => i~166.OUTPUTSELECT
reset_1 => i~167.OUTPUTSELECT
reset_1 => i~168.OUTPUTSELECT
reset_1 => i~169.OUTPUTSELECT
reset_1 => i~170.OUTPUTSELECT
reset_1 => i~171.OUTPUTSELECT
reset_1 => i~581.OUTPUTSELECT
reset_1 => i~582.OUTPUTSELECT
reset_1 => i~583.OUTPUTSELECT
reset_1 => i~584.OUTPUTSELECT
reset_1 => i~585.OUTPUTSELECT
reset_1 => i~586.OUTPUTSELECT
reset_1 => i~587.OUTPUTSELECT
reset_1 => i~588.OUTPUTSELECT
reset_1 => i~589.OUTPUTSELECT
reset_1 => i~590.OUTPUTSELECT
reset_1 => i~591.OUTPUTSELECT
reset_1 => i~592.OUTPUTSELECT
reset_1 => i~593.OUTPUTSELECT
reset_1 => i~594.OUTPUTSELECT
reset_1 => i~595.OUTPUTSELECT
reset_1 => i~596.OUTPUTSELECT
clkmain1 => i~1.IN0
clkmain1 => temp_s0_322u[3].CLK
clkmain1 => temp_s0_322u[2].CLK
clkmain1 => temp_s0_322u[1].CLK
clkmain1 => temp_s0_322u[0].CLK
clkmain1 => counter_s0_322u[2].CLK
clkmain1 => counter_s0_322u[1].CLK
clkmain1 => counter_s0_322u[0].CLK
clkmain1 => iicwork_s1_322u.CLK
clkmain1 => scl_p1_322u~reg0.CLK
clkmain1 => sda_z2_322u~reg0.CLK
clkmain1 => i~598.CLK
clkmain1 => iicdata_s3_322d[7].CLK
clkmain1 => iicdata_s3_322d[6].CLK
clkmain1 => iicdata_s3_322d[5].CLK
clkmain1 => iicdata_s3_322d[4].CLK
clkmain1 => iicdata_s3_322d[3].CLK
clkmain1 => iicdata_s3_322d[2].CLK
clkmain1 => iicdata_s3_322d[1].CLK
clkmain1 => iicdata_s3_322d[0].CLK
clkmain1 => iicdataout_p1_322u[7]~reg0.CLK
clkmain1 => iicdataout_p1_322u[6]~reg0.CLK
clkmain1 => iicdataout_p1_322u[5]~reg0.CLK
clkmain1 => iicdataout_p1_322u[4]~reg0.CLK
clkmain1 => iicdataout_p1_322u[3]~reg0.CLK
clkmain1 => iicdataout_p1_322u[2]~reg0.CLK
clkmain1 => iicdataout_p1_322u[1]~reg0.CLK
clkmain1 => iicdataout_p1_322u[0]~reg0.CLK
clkmain1 => temp_s0_322u[4].CLK
xiicask_1 => i~42.IN0
xiicask_1 => i~22.OUTPUTSELECT
xiicask_1 => i~23.OUTPUTSELECT
xiicask_1 => i~24.OUTPUTSELECT
xiicask_1 => i~25.OUTPUTSELECT
xiicask_1 => i~26.OUTPUTSELECT
xiicask_1 => i~27.OUTPUTSELECT
xiicask_1 => i~28.OUTPUTSELECT
xiicask_1 => i~29.OUTPUTSELECT
xiicask_1 => i~30.OUTPUTSELECT
xiicask_1 => i~31.OUTPUTSELECT
xiicask_1 => i~32.OUTPUTSELECT
xiicask_1 => i~33.OUTPUTSELECT
xiicask_1 => i~34.OUTPUTSELECT
xiicask_1 => i~35.OUTPUTSELECT
xiicask_1 => i~36.OUTPUTSELECT
xiicask_1 => i~37.OUTPUTSELECT
xiicask_1 => i~38.IN0
xiicask_1 => i~40.IN0
xiicask_1 => i~52.OUTPUTSELECT
xiicask_1 => i~53.OUTPUTSELECT
xiicask_1 => i~54.OUTPUTSELECT
xiicask_1 => i~55.OUTPUTSELECT
xiicask_1 => i~56.OUTPUTSELECT
xiicask_1 => i~57.OUTPUTSELECT
xiicask_1 => i~58.OUTPUTSELECT
xiicask_1 => i~59.OUTPUTSELECT
xiicask_1 => i~60.IN0
xiicask_1 => i~61.IN0
xiicask_1 => i~63.IN0
xiichange_1 => i~2.IN0
xiicdatain_3[0] => i~11.DATAB
xiicdatain_3[0] => i~229.DATAB
xiicdatain_3[1] => i~10.DATAB
xiicdatain_3[1] => i~228.DATAB
xiicdatain_3[2] => i~9.DATAB
xiicdatain_3[2] => i~227.DATAB
xiicdatain_3[3] => i~8.DATAB
xiicdatain_3[3] => i~226.DATAB
xiicdatain_3[4] => i~7.DATAB
xiicdatain_3[4] => i~225.DATAB
xiicdatain_3[5] => i~6.DATAB
xiicdatain_3[5] => i~224.DATAB
xiicdatain_3[6] => i~5.DATAB
xiicdatain_3[6] => i~223.DATAB
xiicdatain_3[7] => i~4.DATAB
xiicdatain_3[7] => i~222.DATAB
iicend_p1_321d <= iicend_p1_321d~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[0] <= iicdataout_p1_322u[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[1] <= iicdataout_p1_322u[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[2] <= iicdataout_p1_322u[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[3] <= iicdataout_p1_322u[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[4] <= iicdataout_p1_322u[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[5] <= iicdataout_p1_322u[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[6] <= iicdataout_p1_322u[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
iicdataout_p1_322u[7] <= iicdataout_p1_322u[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
scl_p1_322u <= scl_p1_322u~reg0.DB_MAX_OUTPUT_PORT_TYPE
sda_z2_322u <= i~597