📄 iicrd.csf.rpt
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+-----------------------------------------------------------------------------+
| Output Pins |
+-----------------------------------------------------------------------------+
+-----------------------+-------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
| Name | Pin # | X coordinate | Y coordinate | Cell number | Output Register | Output Enable Register | Power Up High | Slow Slew Rate | PCI I/O Enabled | Open Drain | Bus Hold | Weak Pull Up | Turbo Bit | I/O Standard | Current Strength | Termination |
+-----------------------+-------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
| iicdataout_p1_322u[0] | 196 | 28 | 21 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicdataout_p1_322u[1] | 194 | 28 | 21 | 0 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicdataout_p1_322u[2] | 195 | 28 | 21 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicdataout_p1_322u[3] | 193 | 30 | 21 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicdataout_p1_322u[4] | 187 | 30 | 21 | 0 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicdataout_p1_322u[5] | 198 | 26 | 21 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicdataout_p1_322u[6] | 199 | 26 | 21 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicdataout_p1_322u[7] | 197 | 26 | 21 | 0 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| iicend_p1_321d | 215 | 16 | 21 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| scl_p1_322u | 204 | 22 | 21 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
+-----------------------+-------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
+-----------------------------------------------------------------------------+
| Bidir Pins |
+-----------------------------------------------------------------------------+
+-------------+-------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
| Name | Pin # | X coordinate | Y coordinate | Cell number | Combinational Fan-Out | Registered Fan-Out | Global | Input Register | Output Register | Output Enable Register | Power Up High | Slow Slew Rate | PCI I/O Enabled | Open Drain | Bus Hold | Weak Pull Up | Turbo Bit | I/O Standard | Current Strength | Termination |
+-------------+-------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
| sda_z2_322u | 203 | 22 | 21 | 0 | 4 | 0 | no | no | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
+-------------+-------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
+-----------------------------------------------------------------------------+
| Delay Chain Summary |
+-----------------------------------------------------------------------------+
+-----------------------+----------+---------------+---------------+-----------------------+-----+
| Name | Pin Type | Pad to Core 0 | Pad to Core 1 | Pad to Input Register | TCO |
+-----------------------+----------+---------------+---------------+-----------------------+-----+
| xiicask_1 | Input | ON | ON | OFF | OFF |
| xiichange_1 | Input | ON | ON | OFF | OFF |
| clkmain1 | Input | OFF | OFF | OFF | OFF |
| reset_1 | Input | OFF | OFF | OFF | OFF |
| xiicdatain_3[7] | Input | ON | ON | OFF | OFF |
| xiicdatain_3[6] | Input | ON | ON | OFF | OFF |
| xiicdatain_3[5] | Input | ON | ON | OFF | OFF |
| xiicdatain_3[4] | Input | ON | ON | OFF | OFF |
| xiicdatain_3[3] | Input | ON | ON | OFF | OFF |
| xiicdatain_3[2] | Input | ON | ON | OFF | OFF |
| xiicdatain_3[1] | Input | ON | ON | OFF | OFF |
| xiicdatain_3[0] | Input | ON | ON | OFF | OFF |
| iicend_p1_321d | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[7] | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[6] | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[5] | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[4] | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[3] | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[2] | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[1] | Output | OFF | OFF | OFF | OFF |
| iicdataout_p1_322u[0] | Output | OFF | OFF | OFF | OFF |
| scl_p1_322u | Output | OFF | OFF | OFF | OFF |
| sda_z2_322u | Bidir | ON | ON | OFF | OFF |
+-----------------------+----------+---------------+---------------+-----------------------+-----+
+-----------------------------------------------------------------------------+
| I/O Bank Usage |
+-----------------------------------------------------------------------------+
+--------+------------------+
| Bank # | Usage |
+--------+------------------+
| 1 | 2 / 44 ( 4 % ) |
| 2 | 20 / 48 ( 41 % ) |
| 3 | 1 / 45 ( 2 % ) |
| 4 | 0 / 48 ( 0 % ) |
+--------+------------------+
+-----------------------------------------------------------------------------+
| All Package Pins |
+-----------------------------------------------------------------------------+
+-------+--------+-----------------------+--------------+---------+------------+
| Pin # | Bank # | Usage | I/O Standard | Voltage | I/O Type |
+-------+--------+-----------------------+--------------+---------+------------+
| 1 | 1 | GND* | | | Row I/O |
| 2 | 1 | GND* | | | Row I/O |
| 3 | 1 | GND* | | | Row I/O |
| 4 | 1 | GND* | | | Row I/O |
| 5 | 1 | GND* | | | Row I/O |
| 6 | 1 | GND* | | | Row I/O |
| 7 | 1 | GND* | | | Row I/O |
| 8 | 1 | GND* | | | Row I/O |
| 9 | 1 | VCCIO1 | | 3.3V | -- |
| 10 | 1 | GND | | | -- |
| 11 | 1 | GND* | | | Row I/O |
| 12 | 1 | GND* | | | Row I/O |
| 13 | 1 | GND* | | | Row I/O |
| 14 | 1 | GND* | | | Row I/O |
| 15 | 1 | GND* | | | Row I/O |
| 16 | 1 | GND* | | | Row I/O |
| 17 | 1 | GND* | | | Row I/O |
| 18 | 1 | GND* | | | Row I/O |
| 19 | 1 | GND* | | | Row I/O |
| 20 | 1 | GND* | | | Row I/O |
| 21 | 1 | GND* | | | Row I/O |
| 22 | 1 | VCCIO1 | | 3.3V | -- |
| 23 | 1 | GND* | | | Row I/O |
| 24 | 1 | GND* | | | Row I/O |
| 25 | 1 | ^DATA0 | | | -- |
| 26 | 1 | ^nCONFIG | | | -- |
| 27 | 1 | VCCA_PLL1 | | 1.5V | -- |
| 28 | 1 | reset_1 | LVTTL | | Row I/O |
| 29 | 1 | clkmain1 | LVTTL | | Row I/O |
| 30 | 1 | GNDA_PLL1 | | | -- |
| 31 | 1 | GNDG_PLL1 | | | -- |
| 32 | 1 | ^nCEO | | | -- |
| 33 | 1 | ^nCE | | | -- |
| 34 | 1 | ^MSEL0 | | | -- |
| 35 | 1 | ^MSEL1 | | | -- |
| 36 | 1 | ^DCLK | | | -- |
| 37 | 1 | GND* | | | Row I/O |
| 38 | 1 | GND* | | | Row I/O |
| 39 | 1 | GND* | | | Row I/O |
| 40 | 1 | GND | | | -- |
| 41 | 1 | GND* | | | Row I/O |
| 42 | 1 | GND* | | | Row I/O |
| 43 | 1 | GND* | | | Row I/O |
| 44 | 1 | GND* | | | Row I/O |
| 45 | 1 | GND* | | | Row I/O |
| 46 | 1 | GND* | | | Row I/O |
| 47 | 1 | GND* | | | Row I/O |
| 48 | 1 | GND* | | | Row I/O |
| 49 | 1 | GND* | | | Row I/O |
| 50 | 1 | GND* | | | Row I/O |
| 51 | 1 | VCCIO1 | | 3.3V | -- |
| 52 | 1 | GND | | | -- |
| 53 | 1 | GND* | | | Row I/O |
| 54 | 1 | GND* | | | Row I/O |
| 55 | 1 | GND* | | | Row I/O |
| 56 | 1 | GND* | | | Row I/O |
| 57 | 1 | GND* | | | Row I/O |
| 58 | 1 | GND* | | | Row I/O |
| 59 | 1 | GND* | | | Row I/O |
| 60 | 1 | GND* | | | Row I/O |
| 61 | 4 | GND* | | | Column I/O |
| 62 | 4 | GND* | | | Column I/O |
| 63 | 4 | GND* | | | Column I/O |
| 64 | 4 | GND* | | | Column I/O |
| 65 | 4 | GND* | | | Column I/O |
| 66 | 4 | GND* | | | Column I/O |
| 67 | 4 | GND* | | | Column I/O |
| 68 | 4 | GND* | | | Column I/O |
| 69 | 1 | GND | | | -- |
| 70 | 4 | VCCIO4 | | 3.3V | -- |
| 71 | 1 | GND | | | -- |
| 72 | 1 | VCCINT | | 1.5V | -- |
| 73 | 4 | GND* | | | Column I/O |
| 74 | 4 | GND* | | | Column I/O |
| 75 | 4 | GND* | | | Column I/O |
| 76 | 4 | GND* | | | Column I/O |
| 77 | 4 | GND* | | | Column I/O |
| 78 | 4 | GND* | | | Column I/O |
| 79 | 4 | GND* | | | Column I/O |
| 80 | 4 | GND* | | | Column I/O |
| 81 | 4 | GND* | | | Column I/O |
| 82 | 4 | GND* | | | Column I/O |
| 83 | 4 | GND* | | | Column I/O |
| 84 | 4 | GND* | | | Column I/O |
| 85 | 4 | GND* | | | Column I/O |
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