📄 sdram64m16.vwf

📁 用FPGA实现SDRAM的操作
💻 VWF
📖 第 1 页 / 共 3 页
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SIGNAL("temp_s0_403d[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "temp_s0_403d";
}

SIGNAL("temp_s0_403d[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "temp_s0_403d";
}

SIGNAL("temp_s0_403d[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "temp_s0_403d";
}

SIGNAL("temp_s0_403d[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "temp_s0_403d";
}

SIGNAL("temp_s0_403d[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "temp_s0_403d";
}

SIGNAL("sdramclk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

TRANSITION_LIST("a8_p0_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("addr_p3_402d[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("ba_p3_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("cas_p1_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("clkmain1")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 100000;
			LEVEL 0 FOR 5.0;
			LEVEL 1 FOR 5.0;
		}
	}
}

TRANSITION_LIST("cs_p1_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("dqm_p3_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("ras_p1_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("ready_p1_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("reset_1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 165.0;
		LEVEL 0 FOR 65.0;
		LEVEL 1 FOR 999770.0;
	}
}

TRANSITION_LIST("we_p1_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

TRANSITION_LIST("xcasaddr_3[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xcasaddr_3[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xcasaddr_3[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xcasaddr_3[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xcasaddr_3[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3995.0;
		LEVEL 1 FOR 1610.0;
		LEVEL 0 FOR 994395.0;
	}
}

TRANSITION_LIST("xcasaddr_3[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1665.0;
		LEVEL 1 FOR 1840.0;
		LEVEL 0 FOR 490.0;
		LEVEL 1 FOR 1610.0;
		LEVEL 0 FOR 994395.0;
	}
}

TRANSITION_LIST("xcasaddr_3[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1665.0;
		LEVEL 1 FOR 1840.0;
		LEVEL 0 FOR 490.0;
		LEVEL 1 FOR 1610.0;
		LEVEL 0 FOR 994395.0;
	}
}

TRANSITION_LIST("xcasaddr_3[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1665.0;
		LEVEL 1 FOR 1840.0;
		LEVEL 0 FOR 490.0;
		LEVEL 1 FOR 1610.0;
		LEVEL 0 FOR 994395.0;
	}
}

TRANSITION_LIST("xlength_3[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xlength_3[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xlength_3[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xlength_3[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xlength_3[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xlength_3[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3180.0;
		LEVEL 1 FOR 755.0;
		LEVEL 0 FOR 1240.0;
		LEVEL 1 FOR 165.0;
		LEVEL 0 FOR 994660.0;
	}
}

TRANSITION_LIST("xlength_3[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3180.0;
		LEVEL 1 FOR 755.0;
		LEVEL 0 FOR 996065.0;
	}
}

TRANSITION_LIST("xlength_3[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1755.0;
		LEVEL 1 FOR 5.0;
		LEVEL 0 FOR 1420.0;
		LEVEL 1 FOR 760.0;
		LEVEL 0 FOR 996060.0;
	}
}

TRANSITION_LIST("xrasaddr_3[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xrasaddr_3[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xrasaddr_3[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xrasaddr_3[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xrasaddr_3[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xrasaddr_3[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xrasaddr_3[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1665.0;
		LEVEL 1 FOR 1945.0;
		LEVEL 0 FOR 996390.0;
	}
}

TRANSITION_LIST("xrasaddr_3[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000000.0;
	}
}

TRANSITION_LIST("xrasaddr_3[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3940.0;
		LEVEL 1 FOR 1590.0;
		LEVEL 0 FOR 994470.0;
	}
}

TRANSITION_LIST("xrasaddr_3[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1665.0;
		LEVEL 1 FOR 1945.0;
		LEVEL 0 FOR 996390.0;
	}
}

TRANSITION_LIST("xread_1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1735.0;
		LEVEL 0 FOR 90.0;
		LEVEL 1 FOR 998175.0;
	}
}

TRANSITION_LIST("xwrite_1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 3915.0;
		LEVEL 0 FOR 105.0;
		LEVEL 1 FOR 995980.0;
	}
}

TRANSITION_LIST("length_s0_402d[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("length_s0_402d[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("length_s0_402d[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("length_s0_402d[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("length_s0_402d[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("length_s0_402d[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("length_s0_402d[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("length_s0_402d[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("refreshack_s1_402d")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("refreshask_s1_404u")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_402d[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_402d[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_402d[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("temp_s0_403d[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 1000000.0;
	}
}

TRANSITION_LIST("sdramclk")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000000.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "reset_1";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "clkmain1";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
💿 文件大小 258 K
👤 上传用户 delsboy
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#SDRAM #FPGA #操作
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