📄 i2c.rpt
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*********************************** FB9 ***********************************
Number of signals used by logic mapping into function block: 34
Number of function block inputs used/remaining: 34/6
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 5/3
Number of PLA product terms used/remaining: 32/16
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
irq 1 FB9_1 2 I/O O
(unused) 0 FB9_2 1 I/O
uc_ctrl_txak 3 FB9_3 (b) (b)
i2c_ctrl_detect_stop 3 FB9_4 (b) (b)
(unused) 0 FB9_5 143 I/O
N_PZ_641 2 FB9_6 (b) (b)
N_PZ_683 4 FB9_7 (b) (b)
N_PZ_668 3 FB9_8 (b) (b)
i2c_ctrl_rxak 3 FB9_9 (b) (b)
i2c_ctrl_shift_reg<1> 5 FB9_10 (b) (b)
i2c_ctrl_shift_reg<0> 5 FB9_11 (b) (b)
i2c_ctrl_shift_out 5 FB9_12 (b) (b)
(unused) 0 FB9_13 142 I/O
(unused) 0 FB9_14 141 I/O
i2c_ctrl__n0096 3 FB9_15 140 I/O (b)
N_PZ_662 2 FB9_16 139 I/O (b)
Signals Used by Logic in Function Block
1: N_PZ_564 13: i2c_ctrl_shift_out
24: reset
2: N_PZ_641 14: "i2c_ctrl_shift_reg<0>"
25: scl
3: "data_bus<3>".PIN 15: "i2c_ctrl_shift_reg<1>"
26: scl.PIN
4: i2c_ctrl_arb_lost 16: "i2c_ctrl_shift_reg<6>"
27: sda
5: "i2c_ctrl_clk_cnt<0>"
17: i2c_ctrl_shift_reg_en
28: sda.PIN
6: i2c_ctrl_master_slave
18: i2c_ctrl_shift_reg_ld
29: "uc_ctrl_mbdr_micro<0>"
7: i2c_ctrl_mif 19: i2c_ctrl_slave_sda
30: "uc_ctrl_mbdr_micro<1>"
8: i2c_ctrl_scl_in 20: i2c_ctrl_state_ffd1
31: "uc_ctrl_mbdr_micro<7>"
9: i2c_ctrl_scl_state_fft1
21: i2c_ctrl_state_ffd2
32: uc_ctrl_men
10: i2c_ctrl_scl_state_fft2
22: i2c_ctrl_state_ffd3
33: uc_ctrl_mien
11: i2c_ctrl_sda_out_reg
23: i2c_ctrl_stop_scl_reg
34: uc_ctrl_txak
12: i2c_ctrl_sda_out_reg_d1
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
irq ......X.........................X....... 2 2
uc_ctrl_txak X.X....................X.........X...... 4 4
i2c_ctrl_detect_stop
........................XX.X...X........ 4 4
N_PZ_641 ...................XXX.................. 3 3
N_PZ_683 .......X...X.......XXX...XX............. 7 7
N_PZ_668 .X.................XXX..X............... 5 5
i2c_ctrl_rxak .X........................X............. 2 2
i2c_ctrl_shift_reg<1>
.............XX.XX...........X.......... 5 5
i2c_ctrl_shift_reg<0>
.............X..XX........X.X........... 5 5
i2c_ctrl_shift_out
............X..XXX............X......... 5 5
i2c_ctrl__n0096 ...X.X....X.......X...X................. 5 5
N_PZ_662 ....X...XX.............................. 3 3
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global clock
O - Output (b) - Buried macrocell
*********************************** FB10 ***********************************
Number of signals used by logic mapping into function block: 6
Number of function block inputs used/remaining: 6/34
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 0/8
Number of PLA product terms used/remaining: 2/46
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
i2c_ctrl__n0171 2 FB10_1 4TDI/I/O (b)
(unused) 0 FB10_2 (b)
(unused) 0 FB10_3 5 I/O
(unused) 0 FB10_4 6 I/O
(unused) 0 FB10_5 7 I/O
(unused) 0 FB10_6 (b)
(unused) 0 FB10_7 (b)
(unused) 0 FB10_8 (b)
(unused) 0 FB10_9 (b)
(unused) 0 FB10_10 (b)
(unused) 0 FB10_11 (b)
(unused) 0 FB10_12 8 I/O
(unused) 0 FB10_13 (b)
(unused) 0 FB10_14 9 I/O
(unused) 0 FB10_15 10 I/O
(unused) 0 FB10_16 11 I/O
Signals Used by Logic in Function Block
1: "i2c_ctrl_i2c_header<0>"
3: i2c_ctrl_mal 5: mcf
2: i2c_ctrl_maas 4: i2c_ctrl_master_slave
6: uc_ctrl_mif_bit_reset
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
i2c_ctrl__n0171 XXXXXX.................................. 6 6
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global clock
O - Output (b) - Buried macrocell
*********************************** FB11 ***********************************
Number of signals used by logic mapping into function block: 0
Number of function block inputs used/remaining: 0/40
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 0/8
Number of PLA product terms used/remaining: 0/48
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
(unused) 0 FB11_1 (b)
(unused) 0 FB11_2 (b)
(unused) 0 FB11_3 138 I/O
(unused) 0 FB11_4 (b)
(unused) 0 FB11_5 137 I/O
(unused) 0 FB11_6 (b)
(unused) 0 FB11_7 (b)
(unused) 0 FB11_8 (b)
(unused) 0 FB11_9 (b)
(unused) 0 FB11_10 (b)
(unused) 0 FB11_11 (b)
(unused) 0 FB11_12 136 I/O
(unused) 0 FB11_13 134 I/O
(unused) 0 FB11_14 133 I/O
(unused) 0 FB11_15 132 I/O
(unused) 0 FB11_16 131 I/O
Legend:
Total Pt - Total product terms used by the macrocell signal
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global clock
O - Output (b) - Buried macrocell
*********************************** FB12 ***********************************
Number of signals used by logic mapping into function block: 0
Number of function block inputs used/remaining: 0/40
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 0/8
Number of PLA product terms used/remaining: 0/48
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
(unused) 0 FB12_1 (b)
(unused) 0 FB12_2 (b)
(unused) 0 FB12_3 12 I/O
(unused) 0 FB12_4 14 I/O
(unused) 0 FB12_5 15 I/O
(unused) 0 FB12_6 (b)
(unused) 0 FB12_7 (b)
(unused) 0 FB12_8 (b)
(unused) 0 FB12_9 (b)
(unused) 0 FB12_10 (b)
(unused) 0 FB12_11 (b)
(unused) 0 FB12_12 16 I/O
(unused) 0 FB12_13 (b)
(unused) 0 FB12_14 18 I/O
(unused) 0 FB12_15 19 I/O
(unused) 0 FB12_16 (b)
Legend:
Total Pt - Total product terms used by the macrocell signal
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global clock
O - Output (b) - Buried macrocell
*********************************** FB13 ***********************************
Number of signals used by logic mapping into function block: 0
Number of function block inputs used/remaining: 0/40
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 0/8
Number of PLA product terms used/remaining: 0/48
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
(unused) 0 FB13_1 (b)
(unused) 0 FB13_2 54 I/O
(unused) 0 FB13_3 53 I/O
(unused) 0 FB13_4 (b)
(unused) 0 FB13_5 49 I/O
(unused) 0 FB13_6 (b)
(unused) 0 FB13_7 (b)
(unused) 0 FB13_8 (b)
(unused) 0 FB13_9 (b)
(unused) 0 FB13_10 (b)
(unused) 0 FB13_11 (b)
(unused) 0 FB13_12 48 I/O
(unused) 0 FB13_13 47 I/O
(unused) 0 FB13_14 46 I/O
(unused) 0 FB13_15 (b)
(unused) 0 FB13_16 45 I/O
Legend:
Total Pt - Total product terms used by the macrocell signal
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global clock
O - Output (b) - Buried macrocell
*********************************** FB14 ***********************************
Number of signals used by logic mapping into function block: 0
Number of function block inputs used/remaining: 0/40
Number of foldback NANDs used/remaining: 0/8
Number of function block local control terms used/remaining: 0/8
Number of PLA product terms used/remaining: 0/48
Signal Total Loc Pin Pin Pin
Name Pt # Type Use
(unused)
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