light.vhd

来自「这个是vhdl的彩灯实例程序」· VHDL 代码 · 共 61 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity light is
port(clk1:    in     std_logic;
     light:   buffer std_logic_vector(7 downto 0));
end light;
architecture behv of light is
   constant   len:   integer:=7;
   signal     banner: std_logic:='0';
   signal     clk,clk2:std_logic;
begin
   clk<=(clk1 and banner)or(clk2 and not banner);
   process(clk1)
   begin
       if clk1'event and clk1='1' then
             clk2<=not clk2;
       end if;
   end process;
   process(clk)
         variable  flag:bit_vector(2 downto 0):="000";
   begin
       if clk'event and clk='1' then
            if flag="000" then
                 light<='1'&light(len downto 1);
                 if light(1)='1' then
                      flag:="001";
                 end if;
            elsif flag="001" then
                 light<=light(len-1 downto 0)&'0';
                 if light(6)='0' then
                      flag:="010";
                 end if;
            
            elsif flag="010" then
                  light<="00000000";
                  flag:="110";
            elsif flag="110" then
                  banner<=not banner;
                  flag:="000";
            end if;
       end if;
   end process;
end behv;