tiny16_maxii.map.eqn

这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核

B1L162 = B1_ir[13] & B1_zflag & !B1_ir[12] # !B1_ir[13] & B1_ir[12] & !B1_zflag # !B1_ir[12] & !B1_cflag;


--B1L2 is tiny16:cpu|Select~2052
--operation mode is normal

B1L2 = B1L964 & B1_ir[14] # B1L162 # !B1_ir[15];


--B1L192 is tiny16:cpu|go_write~79
--operation mode is normal

B1L192 = B1_fsm.exec_1 & !B1L2 # !B1L574 # !B1L874;


--A1L3 is cpu_complete~320
--operation mode is normal

A1L3 = A1L1 & A1L17 # B1L092 # B1L192;


--C1_fsm.s3 is flash:flash|fsm.s3
--operation mode is normal

C1_fsm.s3_lut_out = C1_fsm.s2;
C1_fsm.s3 = DFFEAS(C1_fsm.s3_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--M1_fsm.s1 is sram_interface:ram|sram_controller:sram|fsm.s1
--operation mode is normal

M1_fsm.s1_lut_out = B1L092 & E1L06 & !B1L192 & !M1_fsm.idle;
M1_fsm.s1 = DFFEAS(M1_fsm.s1_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--M1_fsm.s5 is sram_interface:ram|sram_controller:sram|fsm.s5
--operation mode is normal

M1_fsm.s5_lut_out = M1_fsm.s4;
M1_fsm.s5 = DFFEAS(M1_fsm.s5_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--E1_fsm.s3 is sram_interface:ram|fsm.s3
--operation mode is normal

E1_fsm.s3_lut_out = M1_complete & B1L192 & !E1_fsm.idle # !M1_complete & E1_fsm.s3;
E1_fsm.s3 = DFFEAS(E1_fsm.s3_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--E1L42 is sram_interface:ram|next_state.idle~64
--operation mode is normal

E1L42 = !E1_fsm.s2 & !M1_fsm.s1 & !M1_fsm.s5 # !E1_fsm.s3;


--A1L4 is cpu_complete~321
--operation mode is normal

A1L4 = A1L97 & !E1L42 # !B1L15 # !A1L97 & C1_fsm.s3 & !E1L42 # !B1L15;


--E1L16 is sram_interface:ram|sram_chipselect~51
--operation mode is normal

E1L16 = B1L982 # B1L192 # B1_fsm.exec_2 & !B1L184;


--A1L5 is cpu_complete~322
--operation mode is normal

A1L5 = A1L3 & A1L4 & A1L07 # E1L16;


--B1L443 is tiny16:cpu|pc_ena~183
--operation mode is normal

B1L443 = A1L5 & B1L384 # !B1_fsm.exec_2 # !A1L5 & !B1_fsm.fetch & !B1_fsm.exec_2;


--B1L543 is tiny16:cpu|pc_ena~184
--operation mode is normal

B1L543 = B1_ir[14] & !B1_ir[15] # !B1_ir[14] & A1L5 & B1_ir[15];


--B1L643 is tiny16:cpu|pc_ena~185
--operation mode is normal

B1L643 = B1L443 & B1L543 & !B1L162 # !B1_fsm.exec_1;


--B1L194 is tiny16:cpu|reduce_nor~1536
--operation mode is normal

B1L194 = !B1_ir[12] & !B1_ir[13] & !B1_ir[15] & !B1_ir[14];


--B1L294 is tiny16:cpu|reduce_nor~1537
--operation mode is normal

B1L294 = B1L484 & B1L984 & B1L684 & !B1_ir[8];


--B1L394 is tiny16:cpu|reduce_nor~1538
--operation mode is normal

B1L394 = B1_ir[3] & B1_ir[2] & B1L294 & !B1_ir[1];


--B1L3 is tiny16:cpu|Select~2053
--operation mode is normal

B1L3 = B1L705 & !B1L394;


--B1L374 is tiny16:cpu|reduce_nor~27
--operation mode is normal

B1L374 = B1_ir[1] # !B1L784 # !B1_ir[3];


--B1L474 is tiny16:cpu|reduce_nor~28
--operation mode is normal

B1L474 = B1_ir[0] # !B1L784 # !B1_ir[3] # !B1_ir[1];


--B1L174 is tiny16:cpu|reduce_nor~25
--operation mode is normal

B1L174 = B1_ir[1] # B1_ir[3] # !B1L294 # !B1_ir[2];


--B1L674 is tiny16:cpu|reduce_nor~32
--operation mode is normal

B1L674 = B1_ir[11] # !B1_ir[10] # !B1L484;


--B1L494 is tiny16:cpu|reduce_nor~1539
--operation mode is normal

B1L494 = B1L374 & B1L474 & B1L174 & B1L674;


--B1L274 is tiny16:cpu|reduce_nor~26
--operation mode is normal

B1L274 = !B1_ir[3] & B1_ir[1] & B1_ir[2] & B1L294;


--B1L594 is tiny16:cpu|reduce_nor~1540
--operation mode is normal

B1L594 = B1L974 & B1L074 & !B1L274 & !B1_ir[14];


--B1L764 is tiny16:cpu|reduce_nor~19
--operation mode is normal

B1L764 = B1L884 & B1L584 & !B1_ir[12] & !B1_ir[13];


--B1L694 is tiny16:cpu|reduce_nor~1541
--operation mode is normal

B1L694 = B1L3 & B1L494 & B1L594 & !B1L764;


--B1L794 is tiny16:cpu|reduce_nor~1542
--operation mode is normal

B1L794 = B1L574 & B1_ir[1] # B1_ir[3] # !B1L784;


--B1L4 is tiny16:cpu|Select~2054
--operation mode is normal

B1L4 = B1L284 & B1L162 # !B1L794 # !B1L694;


--B1L5 is tiny16:cpu|Select~2055
--operation mode is normal

B1L5 = B1L31 & B1_ir[14] # !B1_ir[15];


--B1L913 is tiny16:cpu|k_ena~0
--operation mode is normal

B1L913 = B1_fsm.exec_1 & B1L4 # A1L5 & !B1L5;


--B1L611 is tiny16:cpu|add~893
--operation mode is arithmetic

B1L611_carry_eqn = B1L511;
B1L611 = B1_rx[14] $ (B1L611_carry_eqn);

--B1L711 is tiny16:cpu|add~893COUT
--operation mode is arithmetic

B1L711 = CARRY(B1_rx[14] # !B1L511);


--B1L38 is tiny16:cpu|add~876
--operation mode is arithmetic

B1L38_carry_eqn = B1L28;
B1L38 = B1_rx[14] $ (!B1L38_carry_eqn);

--B1L48 is tiny16:cpu|add~876COUT
--operation mode is arithmetic

B1L48 = CARRY(B1_rx[14] & !B1L28);


--B1L685 is tiny16:cpu|rx[14]~1138
--operation mode is normal

B1L685 = !B1L374 & B1_ir[0] & B1L611 # !B1_ir[0] & B1L38;


--B1L785 is tiny16:cpu|rx[14]~1139
--operation mode is normal

B1L785 = B1_sp[14] & B1L274 # B1_k[5] & !B1L674 # !B1_sp[14] & B1_k[5] & !B1L674;


--B1_ra[14] is tiny16:cpu|ra[14]
--operation mode is normal

B1_ra[14]_lut_out = B1L254 # B1L454 # A1L24 & B1L554;
B1_ra[14] = DFFEAS(B1_ra[14]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L464, , , , );


--B1L885 is tiny16:cpu|rx[14]~1140
--operation mode is normal

B1L885 = B1L785 # B1_ra[14] & !B1L474;


--B1L585 is tiny16:cpu|rx[14]~160
--operation mode is normal

B1L585 = B1L685 # B1L885 # A1L24 & !B1L774;


--B1L495 is tiny16:cpu|rx_ena~51
--operation mode is normal

B1L495 = B1_ir[0] & B1L274 # !B1L474 # !B1L374;


--B1L595 is tiny16:cpu|rx_ena~52
--operation mode is normal

B1L595 = A1L5 & !B1L774 # !B1L674;


--B1L695 is tiny16:cpu|rx_ena~53
--operation mode is normal

B1L695 = B1_fsm.exec_1 & B1L495 # B1_ir[9] & B1L595;


--B1L903 is tiny16:cpu|ir_ena~0
--operation mode is normal

B1L903 = B1_fsm.fetch & A1L5;


--B1L123 is tiny16:cpu|next_state.fetch~329
--operation mode is normal

B1L123 = B1L574 & B1L974 & B1L31;


--B1L6 is tiny16:cpu|Select~2056
--operation mode is normal

B1L6 = !A1L5 & !B1L123 # !B1L2;


--B1L084 is tiny16:cpu|reduce_nor~39
--operation mode is normal

B1L084 = !B1L694 # !B1L5 # !B1L574 # !B1L964;


--E1_datah[5] is sram_interface:ram|datah[5]
--operation mode is normal

E1_datah[5]_lut_out = A1L511;
E1_datah[5] = DFFEAS(E1_datah[5]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L93 is cpu_data_in[13]~2264
--operation mode is normal

A1L93 = B1L05 & E1_datah[5] & !B1L184 # !B1_fsm.exec_2;


--C1_do[1][13] is flash:flash|do[1][13]
--operation mode is normal

C1_do[1][13]_lut_out = J1_dffe10a[13];
C1_do[1][13] = DFFEAS(C1_do[1][13]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L04 is cpu_data_in[13]~2265
--operation mode is normal

A1L04 = !B1L44 & !B1L93 & !B1L05;


--A1L14 is cpu_data_in[13]~2266
--operation mode is normal

A1L14 = A1L93 # C1_do[1][13] & E1L14 # A1L04;


--E1_datah[4] is sram_interface:ram|datah[4]
--operation mode is normal

E1_datah[4]_lut_out = A1L311;
E1_datah[4] = DFFEAS(E1_datah[4]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L83 is cpu_data_in[12]~2267
--operation mode is normal

A1L83 = B1L05 & E1_datah[4] & !B1L184 # !B1_fsm.exec_2;


--C1_do[1][12] is flash:flash|do[1][12]
--operation mode is normal

C1_do[1][12]_lut_out = J1_dffe10a[12];
C1_do[1][12] = DFFEAS(C1_do[1][12]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L73 is cpu_data_in[12]~510
--operation mode is normal

A1L73 = A1L83 # A1L72 & A1L97 # C1_do[1][12];


--E1_datah[7] is sram_interface:ram|datah[7]
--operation mode is normal

E1_datah[7]_lut_out = A1L911;
E1_datah[7] = DFFEAS(E1_datah[7]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L54 is cpu_data_in[15]~2268
--operation mode is normal

A1L54 = B1L05 & E1_datah[7] & !B1L184 # !B1_fsm.exec_2;


--C1_do[1][15] is flash:flash|do[1][15]
--operation mode is normal

C1_do[1][15]_lut_out = J1_dffe10a[15];
C1_do[1][15] = DFFEAS(C1_do[1][15]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L44 is cpu_data_in[15]~508
--operation mode is normal

A1L44 = A1L54 # A1L72 & A1L97 # C1_do[1][15];


--E1_datah[3] is sram_interface:ram|datah[3]
--operation mode is normal

E1_datah[3]_lut_out = A1L111;
E1_datah[3] = DFFEAS(E1_datah[3]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L63 is cpu_data_in[11]~2269
--operation mode is normal

A1L63 = B1L05 & E1_datah[3] & !B1L184 # !B1_fsm.exec_2;


--C1_do[1][11] is flash:flash|do[1][11]
--operation mode is normal

C1_do[1][11]_lut_out = J1_dffe10a[11];
C1_do[1][11] = DFFEAS(C1_do[1][11]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L53 is cpu_data_in[11]~512
--operation mode is normal

A1L53 = A1L63 # A1L72 & A1L97 # C1_do[1][11];


--E1_datah[2] is sram_interface:ram|datah[2]
--operation mode is normal

E1_datah[2]_lut_out = A1L901;
E1_datah[2] = DFFEAS(E1_datah[2]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L43 is cpu_data_in[10]~2270
--operation mode is normal

A1L43 = B1L05 & E1_datah[2] & !B1L184 # !B1_fsm.exec_2;


--C1_do[1][10] is flash:flash|do[1][10]
--operation mode is normal

C1_do[1][10]_lut_out = J1_dffe10a[10];
C1_do[1][10] = DFFEAS(C1_do[1][10]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L33 is cpu_data_in[10]~514
--operation mode is normal

A1L33 = A1L43 # A1L72 & A1L97 # C1_do[1][10];


--E1_datah[0] is sram_interface:ram|datah[0]
--operation mode is normal

E1_datah[0]_lut_out = A1L501;
E1_datah[0] = DFFEAS(E1_datah[0]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L92 is cpu_data_in[8]~2271
--operation mode is normal

A1L92 = B1L05 & E1_datah[0] & !B1L184 # !B1_fsm.exec_2;


--C1_do[1][8] is flash:flash|do[1][8]
--operation mode is normal

C1_do[1][8]_lut_out = J1_dffe10a[8];
C1_do[1][8] = DFFEAS(C1_do[1][8]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L03 is cpu_data_in[8]~2272
--operation mode is normal

A1L03 = A1L92 # C1_do[1][8] & E1L14 # A1L04;


--E1_datah[1] is sram_interface:ram|datah[1]
--operation mode is normal

E1_datah[1]_lut_out = A1L701;
E1_datah[1] = DFFEAS(E1_datah[1]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L23 is cpu_data_in[9]~2273
--operation mode is normal

A1L23 = B1L05 & E1_datah[1] & !B1L184 # !B1_fsm.exec_2;


--C1_do[1][9] is flash:flash|do[1][9]
--operation mode is normal

C1_do[1][9]_lut_out = J1_dffe10a[9];
C1_do[1][9] = DFFEAS(C1_do[1][9]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L13 is cpu_data_in[9]~516
--operation mode is normal

A1L13 = A1L23 # A1L72 & A1L97 # C1_do[1][9];


--E1_datal[7] is sram_interface:ram|datal[7]
--operation mode is normal

E1_datal[7]_lut_out = A1L911;
E1_datal[7] = DFFEAS(E1_datal[7]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L91, , , , );


--D1_data_out[7] is lcd_controller:lcd|data_out[7]
--operation mode is normal

D1_data_out[7]_lut_out = A1L26;
D1_data_out[7] = DFFEAS(D1_data_out[7]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L82 is cpu_data_in[7]~2274