tiny16_maxii.map.eqn

这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核

--B1_sp[0] is tiny16:cpu|sp[0]
--operation mode is arithmetic

B1_sp[0]_lut_out = !B1_sp[0];
B1_sp[0] = DFFEAS(B1_sp[0]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L436, B1_rx[0], , B1L726, B1L274);

--B1L995 is tiny16:cpu|sp[0]~COUT
--operation mode is arithmetic

B1L995 = CARRY(B1_sp[0]);


--B1_pc[0] is tiny16:cpu|pc[0]
--operation mode is normal

B1_pc[0]_lut_out = B1L823 & B1_fsm.exec_2 & A1L8 # !B1_fsm.exec_2 & B1L791;
B1_pc[0] = DFFEAS(B1_pc[0]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L643, , , , );


--B1L71 is tiny16:cpu|address[0]~adv_mux_opt_ptn_567
--operation mode is normal

B1L71 = E1L04 & B1L41 & B1_pc[0] # !B1L41 & B1_sp[0] # !E1L04 & B1L41;


--B1L81 is tiny16:cpu|address[0]~adv_mux_opt_ptn_568
--operation mode is normal

B1L81 = B1L61 & B1L71 & B1_rx[0] # !B1L71 & B1_ir[0] # !B1L61 & B1L71;


--E1L62 is sram_interface:ram|sram_address[1]~329
--operation mode is normal

E1L62 = B1L81 & !E1_fsm.s2 & !B1L184 # !B1_fsm.exec_2;


--E1_fsm.idle is sram_interface:ram|fsm.idle
--operation mode is normal

E1_fsm.idle_lut_out = E1L42 & E1_fsm.idle # E1L16 & M1_complete;
E1_fsm.idle = DFFEAS(E1_fsm.idle_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--E1L95 is sram_interface:ram|sram_address~15
--operation mode is normal

E1L95 = E1_fsm.s2 # !E1_fsm.idle;


--M1_cs is sram_interface:ram|sram_controller:sram|cs
--operation mode is normal

M1_cs_lut_out = M1_we # M1_fsm.s2 # E1L16 & M1L01;
M1_cs = DFFEAS(M1_cs_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--M1_oe is sram_interface:ram|sram_controller:sram|oe
--operation mode is normal

M1_oe_lut_out = B1L092 & E1L06 & !M1_fsm.idle;
M1_oe = DFFEAS(M1_oe_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--M1_we is sram_interface:ram|sram_controller:sram|we
--operation mode is normal

M1_we_lut_out = M1_fsm.s2;
M1_we = DFFEAS(M1_we_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--D1_e is lcd_controller:lcd|e
--operation mode is normal

D1_e_lut_out = D1_fsm.s3 # D1_fsm.s1;
D1_e = DFFEAS(D1_e_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , D1L61, , , , );


--D1_rs is lcd_controller:lcd|rs
--operation mode is normal

D1_rs_lut_out = B1L44 & B1L81 & A1L67 & !E1L14;
D1_rs = DFFEAS(D1_rs_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , !D1_fsm.idle, , , , );


--D1_rw is lcd_controller:lcd|rw
--operation mode is normal

D1_rw_lut_out = B1L092 & !A1L27;
D1_rw = DFFEAS(D1_rw_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , !D1_fsm.idle, , , , );


--A1L96Q is led~reg0
--operation mode is normal

A1L96Q_lut_out = B1L562;
A1L96Q = DFFEAS(A1L96Q_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , A1L76, , , , );


--A1L521Q is temp_ncs~reg0
--operation mode is normal

A1L521Q_lut_out = B1L572;
A1L521Q = DFFEAS(A1L521Q_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , A1L421, , , , );


--A1L721Q is temp_sck~reg0
--operation mode is normal

A1L721Q_lut_out = B1L072;
A1L721Q = DFFEAS(A1L721Q_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , A1L421, , , , );


--J1_dffe12 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|dffe12
--operation mode is normal

J1_dffe12_lut_out = J1L38;
J1_dffe12 = DFFEAS(J1_dffe12_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--J1_ufm_drclk is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|ufm_drclk
--operation mode is normal

J1_ufm_drclk = J1_dffe12 & !J1_wire_maxii_ufm_block1_osc;


--J1_dffe3 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|dffe3
--operation mode is normal

J1_dffe3_lut_out = J1L98;
J1_dffe3 = DFFEAS(J1_dffe3_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , J1_start_op, , , , );


--J1_wire_cntr5_q_int[4] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[4]
--operation mode is normal

J1_wire_cntr5_q_int[4]_lut_out = J1L31 & !J1L29 # !J1_wire_cntr5_q_int[4];
J1_wire_cntr5_q_int[4] = DFFEAS(J1_wire_cntr5_q_int[4]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , J1_dffe3, , , , );


--J1_wire_cntr5_q_int[1] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[1]
--operation mode is normal

J1_wire_cntr5_q_int[1]_lut_out = J1L7;
J1_wire_cntr5_q_int[1] = DFFEAS(J1_wire_cntr5_q_int[1]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , J1_dffe3, , , , );


--J1_wire_cntr5_q_int[3] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[3]
--operation mode is normal

J1_wire_cntr5_q_int[3]_lut_out = J1L11 & !J1L29 # !J1_wire_cntr5_q_int[4];
J1_wire_cntr5_q_int[3] = DFFEAS(J1_wire_cntr5_q_int[3]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , J1_dffe3, , , , );


--J1_wire_cntr5_q_int[0] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[0]
--operation mode is normal

J1_wire_cntr5_q_int[0]_lut_out = J1L5;
J1_wire_cntr5_q_int[0] = DFFEAS(J1_wire_cntr5_q_int[0]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , J1_dffe3, , , , );


--J1_wire_cntr5_q_int[2] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[2]
--operation mode is normal

J1_wire_cntr5_q_int[2]_lut_out = J1L9 & !J1L29 # !J1_wire_cntr5_q_int[4];
J1_wire_cntr5_q_int[2] = DFFEAS(J1_wire_cntr5_q_int[2]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , J1_dffe3, , , , );


--J1L29 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|tmp_data_valid2~21
--operation mode is normal

J1L29 = J1_wire_cntr5_q_int[1] & J1_wire_cntr5_q_int[3] & J1_wire_cntr5_q_int[0] & !J1_wire_cntr5_q_int[2];


--J1L69 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|ufm_drshft~20
--operation mode is normal

J1L69 = J1_dffe3 & J1_wire_cntr5_q_int[4] # !J1L29;


--J1_dffe8a[8] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|dffe8a[8]
--operation mode is normal

J1_dffe8a[8]_lut_out = J1L4 & J1L1 & !E1L14 # !J1L4 & J1_dffe8a[7];
J1_dffe8a[8] = DFFEAS(J1_dffe8a[8]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , J1_ufm_arshft, , , , );


--J1_dffe11 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|dffe11
--operation mode is normal

J1_dffe11_lut_out = !J1_wire_cntr5_q_int[4] & J1_dffe3 & J1L41 # !J1_wire_cntr5_q_int[3];
J1_dffe11 = DFFEAS(J1_dffe11_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--J1_ufm_arclk is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|ufm_arclk
--operation mode is normal

J1_ufm_arclk = J1_dffe11 & !J1_wire_maxii_ufm_block1_osc;


--J1L2 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|add_load~87
--operation mode is normal

J1L2 = J1_wire_cntr5_q_int[3] & J1_wire_cntr5_q_int[1] # J1_wire_cntr5_q_int[2];


--B1L823 is tiny16:cpu|pc[0]~535
--operation mode is normal

B1L823 = B1_fsm.exec_2 & B1L384 # !B1_fsm.exec_2 & B1_fsm.fetch # B1_fsm.exec_1;


--B1_pc[15] is tiny16:cpu|pc[15]
--operation mode is normal

B1_pc[15]_lut_out = B1L823 & B1_fsm.exec_2 & A1L44 # !B1_fsm.exec_2 & B1L891;
B1_pc[15] = DFFEAS(B1_pc[15]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L643, , , , );


--B1_k[7] is tiny16:cpu|k[7]
--operation mode is normal

B1_k[7]_lut_out = B1_fsm.exec_1 & B1L584 & B1_ir[7] & B1L194;
B1_k[7] = DFFEAS(B1_k[7]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L913, , , , );


--B1_rx[15] is tiny16:cpu|rx[15]
--operation mode is normal

B1_rx[15]_lut_out = B1L095;
B1_rx[15] = DFFEAS(B1_rx[15]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L695, , , !B1_fsm.exec_1, );


--B1_sp[15] is tiny16:cpu|sp[15]
--operation mode is normal

B1_sp[15]_carry_eqn = B1L136;
B1_sp[15]_lut_out = B1L036 $ B1_sp[15] $ !B1_sp[15]_carry_eqn;
B1_sp[15] = DFFEAS(B1_sp[15]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L436, B1_rx[15], , B1L726, B1L274);


--B1L25 is tiny16:cpu|address[15]~adv_mux_opt_ptn_657
--operation mode is normal

B1L25 = E1L34 & E1L54 # !E1L34 & E1L54 & B1_k[6] # !E1L54 & B1_sp[15];


--B1L35 is tiny16:cpu|address[15]~adv_mux_opt_ptn_658
--operation mode is normal

B1L35 = E1L94 & B1L25 & B1_rx[15] # !B1L25 & B1_k[7] # !E1L94 & B1L25;


--B1L05 is tiny16:cpu|address[15]~2498
--operation mode is normal

B1L05 = B1_fsm.fetch & B1_pc[15] # !B1_fsm.fetch & B1L35;


--E1_datah[6] is sram_interface:ram|datah[6]
--operation mode is normal

E1_datah[6]_lut_out = A1L711;
E1_datah[6] = DFFEAS(E1_datah[6]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , E1L52, , , , );


--A1L34 is cpu_data_in[14]~2262
--operation mode is normal

A1L34 = B1L05 & E1_datah[6] & !B1L184 # !B1_fsm.exec_2;


--A1L67 is reduce_nor~1011
--operation mode is normal

A1L67 = B1L93 & !B1L05 & !B1L184 # !B1_fsm.exec_2;


--A1L07 is reduce_nor~1
--operation mode is normal

A1L07 = B1L44 # B1L62 # B1L81 # !A1L67;


--A1L77 is reduce_nor~1012
--operation mode is normal

A1L77 = B1L22 # B1L02;


--A1L87 is reduce_nor~1013
--operation mode is normal

A1L87 = !B1L81 & B1_fsm.fetch & !B1_pc[10] # !B1_fsm.fetch & !B1L64;


--A1L17 is reduce_nor~2
--operation mode is normal

A1L17 = A1L77 # !A1L87 # !A1L67 # !B1L62;


--E1L14 is sram_interface:ram|sram_address[13]~310
--operation mode is normal

E1L14 = B1_fsm.exec_2 & B1L074 & !B1_ir[14] # !B1_ir[15];


--A1L27 is reduce_nor~3
--operation mode is normal

A1L27 = E1L14 # B1L05 # !B1L93 # !B1L44;


--B1L15 is tiny16:cpu|address[15]~2499
--operation mode is normal

B1L15 = B1L05 & B1L384 # !B1L074 # !B1_fsm.exec_2;


--A1L72 is cpu_data_in[7]~2263
--operation mode is normal

A1L72 = A1L07 & A1L17 & A1L27 & !B1L15;


--A1L97 is reduce_nor~1014
--operation mode is normal

A1L97 = !E1L14 & B1L44 # B1L93 # B1L05;


--C1_do[1][14] is flash:flash|do[1][14]
--operation mode is normal

C1_do[1][14]_lut_out = J1_dffe10a[14];
C1_do[1][14] = DFFEAS(C1_do[1][14]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L24 is cpu_data_in[14]~506
--operation mode is normal

A1L24 = A1L34 # A1L72 & A1L97 # C1_do[1][14];


--B1L081 is tiny16:cpu|add~926
--operation mode is arithmetic

B1L081_carry_eqn = B1L971;
B1L081 = B1_k[2] $ B1_pc[14] $ !B1L081_carry_eqn;

--B1L181 is tiny16:cpu|add~926COUT
--operation mode is arithmetic

B1L181 = CARRY(B1_k[2] & B1_pc[14] # !B1L971 # !B1_k[2] & B1_pc[14] & !B1L971);


--B1L1 is tiny16:cpu|Select~1055
--operation mode is normal

B1L1 = B1_ir[15] $ B1_ir[14];


--B1L941 is tiny16:cpu|add~910
--operation mode is arithmetic

B1L941_carry_eqn = B1L841;
B1L941 = B1_pc[14] $ (!B1L941_carry_eqn);

--B1L051 is tiny16:cpu|add~910COUT
--operation mode is arithmetic

B1L051 = CARRY(B1_pc[14] & !B1L841);


--B1L381 is tiny16:cpu|add~4257
--operation mode is normal

B1L381 = B1_fsm.exec_1 & B1L081 & B1L1 # !B1_fsm.exec_1 & B1L941;


--D1_fsm.s2 is lcd_controller:lcd|fsm.s2
--operation mode is normal

D1_fsm.s2_lut_out = D1L62 & !D1_fsm.s5 & !D1L3 # !D1_fsm.s3;
D1_fsm.s2 = DFFEAS(D1_fsm.s2_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--L1_safe_q[0] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[0]
--operation mode is arithmetic

L1_safe_q[0]_lut_out = L1_safe_q[0] $ !D1L2;
L1_safe_q[0] = DFFEAS(L1_safe_q[0]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , D1L4, );

--L1L2 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

L1L2 = CARRY(L1_safe_q[0]);


--L1_safe_q[1] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[1]
--operation mode is arithmetic

L1_safe_q[1]_carry_eqn = L1L2;
L1_safe_q[1]_lut_out = L1_safe_q[1] $ (!D1L2 & L1_safe_q[1]_carry_eqn);
L1_safe_q[1] = DFFEAS(L1_safe_q[1]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , D1L4, );

--L1L4 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

L1L4 = CARRY(!L1L2 # !L1_safe_q[1]);


--L1_safe_q[3] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[3]
--operation mode is normal

L1_safe_q[3]_carry_eqn = L1L6;
L1_safe_q[3]_lut_out = L1_safe_q[3] $ (!D1L2 & L1_safe_q[3]_carry_eqn);
L1_safe_q[3] = DFFEAS(L1_safe_q[3]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , D1L4, );


--L1_safe_q[2] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[2]
--operation mode is arithmetic

L1_safe_q[2]_carry_eqn = L1L4;
L1_safe_q[2]_lut_out = L1_safe_q[2] $ (!D1L2 & !L1_safe_q[2]_carry_eqn);
L1_safe_q[2] = DFFEAS(L1_safe_q[2]_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , D1L4, );

--L1L6 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

L1L6 = CARRY(L1_safe_q[2] & !L1L4);


--D1L72 is lcd_controller:lcd|reduce_nor~33
--operation mode is normal

D1L72 = L1_safe_q[0] & L1_safe_q[1] & !L1_safe_q[3] & !L1_safe_q[2];


--D1L1 is lcd_controller:lcd|complete~44
--operation mode is normal

D1L1 = D1_fsm.s2 & D1L72;


--D1_fsm.s5 is lcd_controller:lcd|fsm.s5
--operation mode is normal

D1_fsm.s5_lut_out = D1L71;
D1_fsm.s5 = DFFEAS(D1_fsm.s5_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , , , , , );


--A1L1 is cpu_complete~38
--operation mode is normal

A1L1 = D1L1 # D1_fsm.s5 # !A1L67 # !B1L44;


--B1L364 is tiny16:cpu|ra_data~4922
--operation mode is normal

B1L364 = B1L974 & B1_ir[10] # !B1_ir[11] # !B1L484;


--B1L982 is tiny16:cpu|go_read~159
--operation mode is normal

B1L982 = B1_fsm.fetch # B1_fsm.exec_1 & !B1L364 # !B1L864;


--B1L092 is tiny16:cpu|go_read~160
--operation mode is normal

B1L092 = B1L982 # B1_fsm.exec_2 & B1L384 # !B1L074;


--B1_cflag is tiny16:cpu|cflag
--operation mode is normal

B1_cflag_lut_out = B1L452 # B1_fsm.exec_1 & B1L552 # B1L752;
B1_cflag = DFFEAS(B1_cflag_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L952, , , , );


--B1_zflag is tiny16:cpu|zflag
--operation mode is normal

B1_zflag_lut_out = B1L936 # B1L066 # B1L166 & B1L666;
B1_zflag = DFFEAS(B1_zflag_lut_out, J1_wire_maxii_ufm_block1_osc, VCC, , B1L766, , , , );


--B1L162 is tiny16:cpu|cond_true~139
--operation mode is normal