tiny16_maxii.fit.eqn

这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核

B1L81 = B1L61 & B1L71 & B1_rx[0] # !B1L71 & B1_ir[0] # !B1L61 & B1L71;


--E1L62 is sram_interface:ram|sram_address[1]~329 at LC_X5_Y4_N1
--operation mode is normal

E1L62 = B1L81 & !E1_fsm.s2 & !B1L135 # !B1_fsm.exec_2;


--E1_fsm.idle is sram_interface:ram|fsm.idle at LC_X4_Y5_N4
--operation mode is normal

E1_fsm.idle_lut_out = E1L42 & E1_fsm.idle # E1L16 & M1_complete;
E1_fsm.idle = DFFEAS(E1_fsm.idle_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , , );


--E1L95 is sram_interface:ram|sram_address~15 at LC_X4_Y5_N2
--operation mode is normal

E1L95 = E1_fsm.s2 # !E1_fsm.idle;


--M1_cs is sram_interface:ram|sram_controller:sram|cs at LC_X4_Y4_N7
--operation mode is normal

M1_cs_lut_out = M1_fsm.s2 # M1_we # E1L16 & M1L01;
M1_cs = DFFEAS(M1_cs_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , , );


--M1_oe is sram_interface:ram|sram_controller:sram|oe at LC_X4_Y4_N9
--operation mode is normal

M1_oe_lut_out = B1L043 & !M1_fsm.idle & E1L06;
M1_oe = DFFEAS(M1_oe_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , , );


--M1_we is sram_interface:ram|sram_controller:sram|we at LC_X4_Y4_N4
--operation mode is normal

M1_we_lut_out = M1_fsm.s2;
M1_we = DFFEAS(M1_we_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , , );


--D1_e is lcd_controller:lcd|e at LC_X4_Y10_N8
--operation mode is normal

D1_e_lut_out = D1_fsm.s1 # D1_fsm.s3;
D1_e = DFFEAS(D1_e_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , D1L61, , , , );


--D1_rs is lcd_controller:lcd|rs at LC_X4_Y6_N6
--operation mode is normal

D1_rs_lut_out = !E1L14 & A1L67 & B1L44 & B1L81;
D1_rs = DFFEAS(D1_rs_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , !D1_fsm.idle, , , , );


--D1_rw is lcd_controller:lcd|rw at LC_X3_Y8_N2
--operation mode is normal

D1_rw_lut_out = B1L043 & !A1L27;
D1_rw = DFFEAS(D1_rw_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , !D1_fsm.idle, , , , );


--J1_ufm_drclk is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|ufm_drclk at LC_X2_Y6_N2
--operation mode is normal

J1_dffe12_qfbk = J1_dffe12;
J1_ufm_drclk = J1_dffe12_qfbk & !J1_wire_maxii_ufm_block1_osc;

--J1_dffe12 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|dffe12 at LC_X2_Y6_N2
--operation mode is normal

J1_dffe12 = DFFEAS(J1_ufm_drclk, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , J1L78, , , VCC);


--J1_wire_cntr5_q_int[4] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[4] at LC_X3_Y4_N4
--operation mode is normal

J1_wire_cntr5_q_int[4]_lut_out = J1L71 & !J1_wire_cntr5_q_int[4] # !J1L69;
J1_wire_cntr5_q_int[4] = DFFEAS(J1_wire_cntr5_q_int[4]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , J1_dffe3, , , , );


--J1_wire_cntr5_q_int[3] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[3] at LC_X3_Y4_N2
--operation mode is normal

J1_wire_cntr5_q_int[3]_lut_out = J1L41 & !J1_wire_cntr5_q_int[4] # !J1L69;
J1_wire_cntr5_q_int[3] = DFFEAS(J1_wire_cntr5_q_int[3]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , J1_dffe3, , , , );


--J1_wire_cntr5_q_int[2] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[2] at LC_X3_Y4_N1
--operation mode is normal

J1_wire_cntr5_q_int[2]_lut_out = J1L11 & !J1L69 # !J1_wire_cntr5_q_int[4];
J1_wire_cntr5_q_int[2] = DFFEAS(J1_wire_cntr5_q_int[2]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , J1_dffe3, , , , );


--J1L69 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|tmp_data_valid2~21 at LC_X3_Y4_N3
--operation mode is normal

J1_wire_cntr5_q_int[1]_qfbk = J1_wire_cntr5_q_int[1];
J1L69 = J1_wire_cntr5_q_int[3] & !J1_wire_cntr5_q_int[2] & J1_wire_cntr5_q_int[1]_qfbk & J1_wire_cntr5_q_int[0];

--J1_wire_cntr5_q_int[1] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|wire_cntr5_q_int[1] at LC_X3_Y4_N3
--operation mode is normal

J1_wire_cntr5_q_int[1] = DFFEAS(J1L69, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , J1_dffe3, J1L8, , , VCC);


--J1L001 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|ufm_drshft~20 at LC_X2_Y5_N9
--operation mode is normal

J1L001 = J1_dffe3 & J1_wire_cntr5_q_int[4] # !J1L69;


--J1_dffe8a[8] is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|dffe8a[8] at LC_X5_Y5_N9
--operation mode is normal

J1_dffe8a[8]_lut_out = J1L4 & J1L1 & !E1L14 # !J1L4 & J1_dffe8a[7];
J1_dffe8a[8] = DFFEAS(J1_dffe8a[8]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , J1_ufm_arshft, , , , );


--J1_dffe11 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|dffe11 at LC_X3_Y5_N9
--operation mode is normal

J1_dffe11_lut_out = !J1_wire_cntr5_q_int[4] & J1_dffe3 & J1L81 # !J1_wire_cntr5_q_int[3];
J1_dffe11 = DFFEAS(J1_dffe11_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , , );


--J1_ufm_arclk is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|ufm_arclk at LC_X3_Y5_N3
--operation mode is normal

J1_ufm_arclk = !J1_wire_maxii_ufm_block1_osc & J1_dffe11;


--J1L2 is flash:flash|UFM:flash|UFM_altufm_parallel_pej:UFM_altufm_parallel_pej_component|add_load~87 at LC_X3_Y5_N8
--operation mode is normal

J1L2 = J1_wire_cntr5_q_int[3] & J1_wire_cntr5_q_int[2] # J1_wire_cntr5_q_int[1];


--B1L873 is tiny16:cpu|pc[0]~535 at LC_X6_Y5_N7
--operation mode is normal

B1L873 = B1_fsm.exec_2 & B1L335 # !B1_fsm.exec_2 & B1_fsm.exec_1 # B1_fsm.fetch;


--B1_pc[15] is tiny16:cpu|pc[15] at LC_X6_Y9_N4
--operation mode is normal

B1_pc[15]_lut_out = B1L873 & B1_fsm.exec_2 & A1L44 # !B1_fsm.exec_2 & B1L842;
B1_pc[15] = DFFEAS(B1_pc[15]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , B1L693, , , , );


--B1_k[7] is tiny16:cpu|k[7] at LC_X13_Y6_N2
--operation mode is normal

B1_k[7]_lut_out = B1L535 & B1_fsm.exec_1 & B1_ir[7] & B1L145;
B1_k[7] = DFFEAS(B1_k[7]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , B1L963, , , , );


--B1_sp[15] is tiny16:cpu|sp[15] at LC_X12_Y5_N7
--operation mode is normal

B1_sp[15]_carry_eqn = (!B1L386 & B1L296) # (B1L386 & B1L396);
B1_sp[15]_lut_out = B1L196 $ (B1_sp[15]_carry_eqn $ !B1_sp[15]);
B1_sp[15] = DFFEAS(B1_sp[15]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , B1L696, B1_rx[15], , B1L886, B1L225);


--B1L25 is tiny16:cpu|address[15]~adv_mux_opt_ptn_657 at LC_X10_Y5_N9
--operation mode is normal

B1L25 = E1L34 & E1L54 # !E1L34 & E1L54 & B1_k[6] # !E1L54 & B1_sp[15];


--B1L35 is tiny16:cpu|address[15]~adv_mux_opt_ptn_658 at LC_X10_Y5_N6
--operation mode is normal

B1L35 = E1L94 & B1L25 & B1_rx[15] # !B1L25 & B1_k[7] # !E1L94 & B1L25;


--B1L05 is tiny16:cpu|address[15]~2498 at LC_X10_Y5_N4
--operation mode is normal

B1L05 = B1_fsm.fetch & B1_pc[15] # !B1_fsm.fetch & B1L35;


--A1L34 is cpu_data_in[14]~2262 at LC_X6_Y6_N7
--operation mode is normal

E1_datah[6]_qfbk = E1_datah[6];
A1L34 = B1L05 & E1_datah[6]_qfbk & !B1L135 # !B1_fsm.exec_2;

--E1_datah[6] is sram_interface:ram|datah[6] at LC_X6_Y6_N7
--operation mode is normal

E1_datah[6] = DFFEAS(A1L34, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , E1L52, A1L711, , , VCC);


--A1L67 is reduce_nor~1011 at LC_X5_Y6_N4
--operation mode is normal

A1L67 = !B1L05 & B1L93 & !B1L135 # !B1_fsm.exec_2;


--A1L07 is reduce_nor~1 at LC_X4_Y6_N0
--operation mode is normal

A1L07 = B1L62 # B1L44 # B1L81 # !A1L67;


--A1L77 is reduce_nor~1012 at LC_X4_Y6_N9
--operation mode is normal

A1L77 = B1L22 # B1L02;


--A1L87 is reduce_nor~1013 at LC_X4_Y6_N4
--operation mode is normal

A1L87 = !B1L81 & B1_fsm.fetch & !B1_pc[10] # !B1_fsm.fetch & !B1L64;


--A1L17 is reduce_nor~2 at LC_X4_Y6_N5
--operation mode is normal

A1L17 = A1L77 # !A1L87 # !A1L67 # !B1L62;


--E1L14 is sram_interface:ram|sram_address[13]~310 at LC_X7_Y5_N6
--operation mode is normal

E1L14 = B1_fsm.exec_2 & B1L025 & !B1_ir[15] # !B1_ir[14];


--A1L27 is reduce_nor~3 at LC_X5_Y6_N7
--operation mode is normal

A1L27 = E1L14 # B1L05 # !B1L44 # !B1L93;


--B1L15 is tiny16:cpu|address[15]~2499 at LC_X6_Y5_N8
--operation mode is normal

B1L15 = B1L05 & B1L335 # !B1_fsm.exec_2 # !B1L025;


--A1L72 is cpu_data_in[7]~2263 at LC_X6_Y8_N3
--operation mode is normal

A1L72 = A1L27 & A1L17 & A1L07 & !B1L15;


--A1L97 is reduce_nor~1014 at LC_X5_Y6_N2
--operation mode is normal

A1L97 = !E1L14 & B1L93 # B1L05 # B1L44;


--A1L24 is cpu_data_in[14]~506 at LC_X7_Y6_N3
--operation mode is normal

A1L24 = A1L34 # A1L72 & C1_do[1][14] # A1L97;

--B1_ir[14] is tiny16:cpu|ir[14] at LC_X7_Y6_N3
--operation mode is normal

B1_ir[14] = DFFEAS(A1L24, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , B1L953, , , , );


--B1L922 is tiny16:cpu|add~926 at LC_X8_Y9_N6
--operation mode is arithmetic

B1L922_carry_eqn = (!B1L522 & B1L722) # (B1L522 & B1L822);
B1L922 = B1_k[2] $ B1_pc[14] $ !B1L922_carry_eqn;

--B1L032 is tiny16:cpu|add~926COUT at LC_X8_Y9_N6
--operation mode is arithmetic

B1L032_cout_0 = B1_k[2] & B1_pc[14] # !B1L722 # !B1_k[2] & B1_pc[14] & !B1L722;
B1L032 = CARRY(B1L032_cout_0);

--B1L132 is tiny16:cpu|add~926COUTCOUT1_4327 at LC_X8_Y9_N6
--operation mode is arithmetic

B1L132_cout_1 = B1_k[2] & B1_pc[14] # !B1L822 # !B1_k[2] & B1_pc[14] & !B1L822;
B1L132 = CARRY(B1L132_cout_1);


--B1L1 is tiny16:cpu|Select~1055 at LC_X8_Y7_N0
--operation mode is normal

B1L1 = B1_ir[15] $ B1_ir[14];


--B1L681 is tiny16:cpu|add~910 at LC_X7_Y10_N6
--operation mode is arithmetic

B1L681_carry_eqn = (!B1L281 & B1L481) # (B1L281 & B1L581);
B1L681 = B1_pc[14] $ !B1L681_carry_eqn;

--B1L781 is tiny16:cpu|add~910COUT at LC_X7_Y10_N6
--operation mode is arithmetic

B1L781_cout_0 = B1_pc[14] & !B1L481;
B1L781 = CARRY(B1L781_cout_0);

--B1L881 is tiny16:cpu|add~910COUTCOUT1_4339 at LC_X7_Y10_N6
--operation mode is arithmetic

B1L881_cout_1 = B1_pc[14] & !B1L581;
B1L881 = CARRY(B1L881_cout_1);


--B1L332 is tiny16:cpu|add~4257 at LC_X5_Y9_N2
--operation mode is normal

B1L332 = B1_fsm.exec_1 & B1L1 & B1L922 # !B1_fsm.exec_1 & B1L681;


--D1_fsm.s2 is lcd_controller:lcd|fsm.s2 at LC_X4_Y9_N7
--operation mode is normal

D1_fsm.s2_lut_out = !D1_fsm.s5 & D1L62 & !D1_fsm.s3 # !D1L3;
D1_fsm.s2 = DFFEAS(D1_fsm.s2_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , , );


--L1_safe_q[0] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[0] at LC_X4_Y10_N0
--operation mode is arithmetic

L1_safe_q[0]_lut_out = D1L2 $ !L1_safe_q[0];
L1_safe_q[0] = DFFEAS(L1_safe_q[0]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , D1L4, );

--L1L2 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella0~COUT at LC_X4_Y10_N0
--operation mode is arithmetic

L1L2_cout_0 = L1_safe_q[0];
L1L2 = CARRY(L1L2_cout_0);

--L1L3 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella0~COUTCOUT1_3 at LC_X4_Y10_N0
--operation mode is arithmetic

L1L3_cout_1 = L1_safe_q[0];
L1L3 = CARRY(L1L3_cout_1);


--L1_safe_q[1] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[1] at LC_X4_Y10_N1
--operation mode is arithmetic

L1_safe_q[1]_lut_out = L1_safe_q[1] $ (!D1L2 & L1L2);
L1_safe_q[1] = DFFEAS(L1_safe_q[1]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , D1L4, );

--L1L5 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella1~COUT at LC_X4_Y10_N1
--operation mode is arithmetic

L1L5_cout_0 = !L1L2 # !L1_safe_q[1];
L1L5 = CARRY(L1L5_cout_0);

--L1L6 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella1~COUTCOUT1 at LC_X4_Y10_N1
--operation mode is arithmetic

L1L6_cout_1 = !L1L3 # !L1_safe_q[1];
L1L6 = CARRY(L1L6_cout_1);


--L1_safe_q[3] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[3] at LC_X4_Y10_N3
--operation mode is normal

L1_safe_q[3]_lut_out = L1_safe_q[3] $ (!D1L2 & L1L8);
L1_safe_q[3] = DFFEAS(L1_safe_q[3]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , D1L4, );


--L1_safe_q[2] is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|safe_q[2] at LC_X4_Y10_N2
--operation mode is arithmetic

L1_safe_q[2]_lut_out = L1_safe_q[2] $ (!D1L2 & !L1L5);
L1_safe_q[2] = DFFEAS(L1_safe_q[2]_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , , , , D1L4, );

--L1L8 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella2~COUT at LC_X4_Y10_N2
--operation mode is arithmetic

L1L8_cout_0 = L1_safe_q[2] & !L1L5;
L1L8 = CARRY(L1L8_cout_0);

--L1L9 is lcd_controller:lcd|lpm_counter:count_rtl_0|cntr_2q7:auto_generated|counter_cella2~COUTCOUT1_2 at LC_X4_Y10_N2
--operation mode is arithmetic

L1L9_cout_1 = L1_safe_q[2] & !L1L6;
L1L9 = CARRY(L1L9_cout_1);


--D1L72 is lcd_controller:lcd|reduce_nor~33 at LC_X4_Y10_N6
--operation mode is normal

D1L72 = !L1_safe_q[3] & L1_safe_q[1] & L1_safe_q[0] & !L1_safe_q[2];


--D1L1 is lcd_controller:lcd|complete~44 at LC_X4_Y8_N1
--operation mode is normal

D1L1 = D1L72 & D1_fsm.s2;


--A1L1 is cpu_complete~38 at LC_X4_Y6_N8
--operation mode is normal

A1L1 = D1_fsm.s5 # D1L1 # !B1L44 # !A1L67;


--B1L315 is tiny16:cpu|ra_data~4922 at LC_X11_Y6_N3
--operation mode is normal

B1L315 = B1L925 & B1_ir[10] # !B1_ir[11] # !B1L435;


--B1L933 is tiny16:cpu|go_read~159 at LC_X6_Y4_N2
--operation mode is normal

B1L933 = B1_fsm.fetch # B1_fsm.exec_1 & !B1L815 # !B1L315;


--B1L043 is tiny16:cpu|go_read~160 at LC_X6_Y5_N4
--operation mode is normal

B1L043 = B1L933 # B1_fsm.exec_2 & B1L335 # !B1L025;


--B1_cflag is tiny16:cpu|cflag at LC_X10_Y10_N6
--operation mode is normal

B1_cflag_lut_out = B1L403 # B1_fsm.exec_1 & B1L703 # B1L503;
B1_cflag = DFFEAS(B1_cflag_lut_out, GLOBAL(J1_wire_maxii_ufm_block1_osc), VCC, , B1L903, , , , );


--B1_zflag is tiny16:cpu|zflag at LC_X11_Y10_N6
--operation mode is normal