tiny16_maxii.qsf

这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		tiny16_MAXII_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:04:10  NOVEMBER 24, 2004"
set_global_assignment -name LAST_QUARTUS_VERSION 4.2
set_global_assignment -name VERILOG_FILE "C:\\OtherQuartusProjects\\Processor\\Verilog\\tiny16\\tiny16_MAXII.v"
set_global_assignment -name VECTOR_WAVEFORM_FILE tiny16_MAXII.vwf
set_global_assignment -name MIF_FILE monitor.mif

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_T13 -to led
set_location_assignment PIN_B3 -to v_lcd_ena
set_location_assignment PIN_B10 -to lcd_db[0]
set_location_assignment PIN_C10 -to lcd_db[1]
set_location_assignment PIN_D10 -to lcd_db[2]
set_location_assignment PIN_A9 -to lcd_db[3]
set_location_assignment PIN_B9 -to lcd_db[4]
set_location_assignment PIN_C9 -to lcd_db[5]
set_location_assignment PIN_D9 -to lcd_db[6]
set_location_assignment PIN_A8 -to lcd_db[7]
set_location_assignment PIN_A10 -to lcd_e
set_location_assignment PIN_C11 -to lcd_rs
set_location_assignment PIN_D11 -to lcd_rw
set_location_assignment PIN_B14 -to temp_ncs
set_location_assignment PIN_C13 -to temp_sck
set_location_assignment PIN_A15 -to temp_sdo
set_location_assignment PIN_T2 -to sram_address[0]
set_location_assignment PIN_T4 -to sram_address[1]
set_location_assignment PIN_P4 -to sram_address[2]
set_location_assignment PIN_R5 -to sram_address[3]
set_location_assignment PIN_N8 -to sram_address[4]
set_location_assignment PIN_R9 -to sram_address[5]
set_location_assignment PIN_T10 -to sram_address[6]
set_location_assignment PIN_P10 -to sram_address[7]
set_location_assignment PIN_R10 -to sram_address[8]
set_location_assignment PIN_P9 -to sram_address[9]
set_location_assignment PIN_T9 -to sram_address[10]
set_location_assignment PIN_P8 -to sram_address[11]
set_location_assignment PIN_T8 -to sram_address[12]
set_location_assignment PIN_T5 -to sram_address[13]
set_location_assignment PIN_R4 -to sram_address[14]
set_location_assignment PIN_R3 -to sram_address[15]
set_location_assignment PIN_R1 -to sram_address[16]
set_location_assignment PIN_R6 -to sram_data[0]
set_location_assignment PIN_N6 -to sram_data[1]
set_location_assignment PIN_R7 -to sram_data[2]
set_location_assignment PIN_N7 -to sram_data[3]
set_location_assignment PIN_P7 -to sram_data[4]
set_location_assignment PIN_T7 -to sram_data[5]
set_location_assignment PIN_P6 -to sram_data[6]
set_location_assignment PIN_T6 -to sram_data[7]
set_location_assignment PIN_N5 -to sram_ncs
set_location_assignment PIN_P5 -to sram_noe
set_location_assignment PIN_R8 -to sram_nwe
set_location_assignment PIN_A2 -to v_sram_ena

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY tiny16_MAXII

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM1270F256C5ES
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF

# Simulator Assignments
# =====================
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name SETUP_HOLD_DETECTION OFF
set_global_assignment -name GLITCH_INTERVAL "1 ns"

# Design Assistant Assignments
# ============================
set_global_assignment -name ASSG_CAT OFF
set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF
set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF
set_global_assignment -name HCPY_PLL_MULTIPLE_CLK_NETWORK_TYPES OFF
set_global_assignment -name ENABLE_DRC_SETTINGS ON
set_global_assignment -name HCPY_CAT OFF
set_global_assignment -name HCPY_VREF_PINS OFF

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT off