opcode.dat

这是8位微处理器的Verilog源代码

LDI      3       87      A                 
LDACC    5       88      R
STACC    5       90      R
LDM      3       60      D
STM      3       68      D
ADDACCI  7       07      I
SUBACCI  7       0F      I
ANDACCI  7       17      I
ORACCI   6       1F      I
XORACCI  7       27      I
CMPACCI  7       47      I
ADDACC   6       00      R
SUBACC   6       08      R
ANDACC   6       10      R
ORACC    5       18      R
XORACC   6       20      R
NOTACC   6       28      U
SHRACC   6       30      U
SHLACC   6       38      U
CMPACC   6       40      R
JE       2       98      B
JNE      3       a0      B
JP       2       a8      B
JN       2       b0      B
JC       2       b8      B
JNC      3       c0      B
JMP      3       c8      B
CALL     4       d6      B
RET      3       de      U
PUSH     4       70      R
POP      3       78      U
ACC      3       0       x
AX       2       1       x
BX       2       2       x
FLAG     4       4       x
PORT     4       5       x
END

; A few comments about this file
;
; (0)  All entries must be in upper case
; (1)  Must end with 'END'.
; (2)  All lines after 'END' is ignored
; (3)  First  column is the opcode,
; (4)  Second column is opcode in hex
; (5)  Third  column is addresing mode of this opcode
;        U = unary.          I.e no operand
;        I = acc immediate.  I.e. an 8bit number to follow
;                      example #10
;        R = register direct I.e. acc,ax,bx,p or flag to follow
;                      example ACC, AX< BX, P or FLAG
;        D = direct mode     I.e. 2byte address to follow
;                      example #0123  
;        A = register immediate  register and immediate data to follow
;        B = branching.  need to store the label for pass 2
;        x  = don't care