📄 sy12.lst
字号:
134 F0095 0982 S* mov.b Tsec,r0l ; Tsec => r0l
135 F0097 7C8A80 * movll r0l,LED ; r0l => LED(low => low)
136 F009A 7C9A81 * movhl r0l,LED+1 ; r0l => LED+1(hight => low)
137 F009D FE12 B jmp exit1
138 F009F timer_end:
139 F009F E50185 S* cmp.b #1,cnt_clr
140 F00A2 CD0082 * stz #00,Tsec
141 F00A5 CD0084 * stz #0,sw_in ; sw_in flag clear(stop)
142 F00A8 0982 S* mov.b Tsec,r0l ; Tsec => r0l
143 F00AA 7C8A80 * movll r0l,LED ; r0l => LED(low => low)
144 F00AD 7C9A81 * movhl r0l,LED+1 ; r0l => LED+1(hight => low)
145 F00B0 92 S exit1: pop.b r0l
146 F00B1 F3 rts
147
148 ;
149 ;---------- LED DISPLAY ----------
150 ;
151 F00B2 display:
152 F00B2 C2 S push.w a0
153 F00B3 C5FF60 S* mov.b #0FFH,p0 ; turn off LED
154 F00B6 850183 S* add.b #1,Fdig ; digit flag count up
155 F00B9 E50283 S* cmp.b #2,Fdig ; Fdig=2?
156 F00BC CD0083 * stz #0,Fdig ; Fdig clear at r0l=4
157 F00BF 3183 S* mov.b Fdig,a0 ; Fdig => a0
158 F00C1 72C40004 mov.b LED[a0],a0 ; display data read
159 F00C5 749A60D5000F * lde.b LED_data[a0],p0 ; P0 output
160 F00CB 3183 S* mov.b Fdig,a0 ; Fdig => a0
161 F00CD 749A61DF000F * lde.b Digit_data[a0],p1 ; P1 output
162 F00D3 D2 S pop.w a0
163 F00D4 F3 rts
164
165 F00D5 LED_data:
166 F00D5 C0F9A4B0 .byte 0C0H,0F9H,0A4H,0B0H,099H ;0,1,2,3,4
99
167 F00DA 9282F880 .byte 092H,082H,0F8H,080H,098H ;5,6,7,8,9
98
168 F00DF Digit_data:
169 F00DF FDFE .byte 0FDH,0FEH ;1,2digit
170 ;---------- DUMMY UART0 INTERRUPT PROGRAM ----------
171 F00E1 dummy:
172 F00E1 FB reit
173 ;---------- VARIABLE VECTOR TABLE SET ----------
174 ;
175 .section val_vect,romdata
176 FA000 .org Vintbase
177 FA000 USER_vector_table:
178 FA000 E1000F00 .lword dummy ; No0 Break Interrupt
179 FA004 E1000F00 .lword dummy ; No1 Break Interrupt
180 FA008 E1000F00 .lword dummy ; No2 Break Interrupt
181 FA00C E1000F00 .lword dummy ; No3 Break Interrupt
182 FA010 E1000F00 .lword dummy ; No4 Break Interrupt
183 FA014 E1000F00 .lword dummy ; No5 Break Interrupt
* M16C FAMILY ASSEMBLER * SOURCE LIST Tue Mar 29 13:42:07 2005 PAGE 004
SEQ. LOC. OBJ. 0XMSDA ....*....SOURCE STATEMENT....7....*....8....*....9....*....0....*....1....*....2....*....3....*....4
184 FA018 E1000F00 .lword dummy ; No6 Break Interrupt
185 FA01C E1000F00 .lword dummy ; No7 Break Interrupt
186 FA020 E1000F00 .lword dummy ; No8 Break Interrupt
187 FA024 E1000F00 .lword dummy ; No9 Break Interrupt
188 FA028 E1000F00 .lword dummy ; No10 Bus Clash Detect
189 FA02C E1000F00 .lword dummy ; No11 DMA0
190 FA030 E1000F00 .lword dummy ; No12 DMA1
191 FA034 E1000F00 .lword dummy ; No13 KEY IN Interrupt
192 FA038 79000F00 .lword sw_adtrg ; No14 A-D Interrupt
193 FA03C E1000F00 .lword dummy ; No15 UART2 Transmission Interrupt
194 FA040 E1000F00 .lword dummy ; No16 UART2 receive Interrupt
195 FA044 E1000F00 .lword dummy ; No17 UART0 Transmission Interrupt
196 FA048 E1000F00 .lword dummy ; No18 UART0 receive Interrupt
197 FA04C 6BCB0F00 .lword 0FCB6BH ; No19 UART1 Transmission Interrupt
198 FA050 6BCB0F00 .lword 0FCB6BH ; No20 UART1 receive Interrupt
199 FA054 E1000F00 .lword dummy ; No21 TimerA0 Interrupt
200 FA058 E1000F00 .lword dummy ; No22 TimerA1 Interrupt
201 FA05C E1000F00 .lword dummy ; No23 TimerA2 Interrupt
202 FA060 E1000F00 .lword dummy ; No24 TimerA3 Interrupt
203 FA064 E1000F00 .lword dummy ; No25 TimerA4 Interrupt
204 FA068 E1000F00 .lword dummy ; No26 TimerB0 Interrupt
205 FA06C E1000F00 .lword dummy ; No27 TimerB1 Interrupt
206 FA070 E1000F00 .lword dummy ; No28 TimerB2 Interrupt
207 FA074 74000F00 .lword sw_int0 ; No29 INIT0(Active Low) Interrupt
208 FA078 61000F00 .lword sw_int1 ; No30 INIT1(Active Low) Interrupt
209 FA07C E1000F00 .lword dummy ; No31 INIT2(Active Low) Interrupt
210 FA080 E1000F00 .lword dummy ; No32 S/W Interrupt
211 FA084 E1000F00 .lword dummy ; No33 S/W Interrupt
212 FA088 E1000F00 .lword dummy ; No34 S/W Interrupt
213 FA08C E1000F00 .lword dummy ; No35 S/W Interrupt
214 FA090 E1000F00 .lword dummy ; No36 S/W Interrupt
215 FA094 E1000F00 .lword dummy ; No37 S/W Interrupt
216 FA098 E1000F00 .lword dummy ; No38 S/W Interrupt
217 FA09C E1000F00 .lword dummy ; No39 S/W Interrupt
218 FA0A0 E1000F00 .lword dummy ; No40 S/W Interrupt
219 FA0A4 E1000F00 .lword dummy ; No41 S/W Interrupt
220 FA0A8 E1000F00 .lword dummy ; No42 S/W Interrupt
221 FA0AC E1000F00 .lword dummy ; No43 S/W Interrupt
222 FA0B0 E1000F00 .lword dummy ; No44 S/W Interrupt
223 FA0B4 E1000F00 .lword dummy ; No45 S/W Interrupt
224 FA0B8 E1000F00 .lword dummy ; No46 S/W Interrupt
225 FA0BC E1000F00 .lword dummy ; No47 S/W Interrupt
226 FA0C0 E1000F00 .lword dummy ; No48 S/W Interrupt
227 FA0C4 E1000F00 .lword dummy ; No49 S/W Interrupt
228 FA0C8 E1000F00 .lword dummy ; No50 S/W Interrupt
229 FA0CC E1000F00 .lword dummy ; No51 S/W Interrupt
230 FA0D0 E1000F00 .lword dummy ; No52 S/W Interrupt
231 FA0D4 E1000F00 .lword dummy ; No53 S/W Interrupt
232 FA0D8 E1000F00 .lword dummy ; No54 S/W Interrupt
233 FA0DC E1000F00 .lword dummy ; No55 S/W Interrupt
234 FA0E0 E1000F00 .lword dummy ; No56 S/W Interrupt
235 FA0E4 E1000F00 .lword dummy ; No57 S/W Interrupt
236 FA0E8 E1000F00 .lword dummy ; No58 S/W Interrupt
237 FA0EC E1000F00 .lword dummy ; No59 S/W Interrupt
238 FA0F0 E1000F00 .lword dummy ; No60 S/W Interrupt
239 FA0F4 E1000F00 .lword dummy ; No61 S/W Interrupt
240 FA0F8 E1000F00 .lword dummy ; No62 S/W Interrupt
241 FA0FC E1000F00 .lword dummy ; No63 S/W Interrupt
242
243 ;
244 ;---------- VECTOR TABLE ----------
245 ;
* M16C FAMILY ASSEMBLER * SOURCE LIST Tue Mar 29 13:42:07 2005 PAGE 005
SEQ. LOC. OBJ. 0XMSDA ....*....SOURCE STATEMENT....7....*....8....*....9....*....0....*....1....*....2....*....3....*....4
246 .section inter,romdata
247 FFFFC .org Vvector+(8*4)
248 FFFFC 00000F00 .lword reset
249
250 ;
251 ;---------- PROGRAM END ----------
252 ;
253 .end
Information List
TOTAL ERROR(S) 00000
TOTAL WARNING(S) 00000
TOTAL LINE(S) 00253 LINES
Section List
Attr Size Name
DATA 0000006(00006H) memory
CODE 0000226(000E2H) prog
ROMDATA 0000256(00100H) val_vect
ROMDATA 0000004(00004H) inter
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