mux_pgc.tdf

主要完成数字电视前端信号处理和缓冲作用的verilog源代码

--lpm_mux CASCADE_CHAIN="MANUAL" DEVICE_FAMILY="Cyclone" IGNORE_CASCADE_BUFFERS="OFF" LPM_SIZE=2 LPM_WIDTH=16 LPM_WIDTHS=1 data result sel
--VERSION_BEGIN 4.1 cbx_lpm_mux 2004:03:10:10:50:34:SJ cbx_mgl 2004:06:17:17:30:06:SJ  VERSION_END


--  Copyright (C) 1988-2002 Altera Corporation
--  Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
--  support information,  device programming or simulation file,  and any other
--  associated  documentation or information  provided by  Altera  or a partner
--  under  Altera's   Megafunction   Partnership   Program  may  be  used  only
--  to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
--  other  use  of such  megafunction  design,  netlist,  support  information,
--  device programming or simulation file,  or any other  related documentation
--  or information  is prohibited  for  any  other purpose,  including, but not
--  limited to  modification,  reverse engineering,  de-compiling, or use  with
--  any other  silicon devices,  unless such use is  explicitly  licensed under
--  a separate agreement with  Altera  or a megafunction partner.  Title to the
--  intellectual property,  including patents,  copyrights,  trademarks,  trade
--  secrets,  or maskworks,  embodied in any such megafunction design, netlist,
--  support  information,  device programming or simulation file,  or any other
--  related documentation or information provided by  Altera  or a megafunction
--  partner, remains with Altera, the megafunction partner, or their respective
--  licensors. No other licenses, including any licenses needed under any third
--  party's intellectual property, are provided herein.



--synthesis_resources = lut 16 
SUBDESIGN mux_pgc
( 
	data[31..0]	:	input;
	result[15..0]	:	output;
	sel[0..0]	:	input;
) 
VARIABLE 
	result_node[15..0]	: WIRE;
	sel_node[0..0]	: WIRE;
	w_data102w[1..0]	: WIRE;
	w_data114w[1..0]	: WIRE;
	w_data126w[1..0]	: WIRE;
	w_data138w[1..0]	: WIRE;
	w_data150w[1..0]	: WIRE;
	w_data162w[1..0]	: WIRE;
	w_data174w[1..0]	: WIRE;
	w_data186w[1..0]	: WIRE;
	w_data18w[1..0]	: WIRE;
	w_data30w[1..0]	: WIRE;
	w_data42w[1..0]	: WIRE;
	w_data4w[1..0]	: WIRE;
	w_data54w[1..0]	: WIRE;
	w_data66w[1..0]	: WIRE;
	w_data78w[1..0]	: WIRE;
	w_data90w[1..0]	: WIRE;
	w_result103w	: WIRE;
	w_result109w	: WIRE;
	w_result115w	: WIRE;
	w_result11w	: WIRE;
	w_result121w	: WIRE;
	w_result127w	: WIRE;
	w_result133w	: WIRE;
	w_result139w	: WIRE;
	w_result145w	: WIRE;
	w_result151w	: WIRE;
	w_result157w	: WIRE;
	w_result163w	: WIRE;
	w_result169w	: WIRE;
	w_result175w	: WIRE;
	w_result181w	: WIRE;
	w_result187w	: WIRE;
	w_result193w	: WIRE;
	w_result19w	: WIRE;
	w_result25w	: WIRE;
	w_result31w	: WIRE;
	w_result37w	: WIRE;
	w_result43w	: WIRE;
	w_result49w	: WIRE;
	w_result55w	: WIRE;
	w_result5w	: WIRE;
	w_result61w	: WIRE;
	w_result67w	: WIRE;
	w_result73w	: WIRE;
	w_result79w	: WIRE;
	w_result85w	: WIRE;
	w_result91w	: WIRE;
	w_result97w	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( w_result187w, w_result175w, w_result163w, w_result151w, w_result139w, w_result127w, w_result115w, w_result103w, w_result91w, w_result79w, w_result67w, w_result55w, w_result43w, w_result31w, w_result19w, w_result5w);
	sel_node[] = ( sel[0..0]);
	w_data102w[] = ( data[24..24], data[8..8]);
	w_data114w[] = ( data[25..25], data[9..9]);
	w_data126w[] = ( data[26..26], data[10..10]);
	w_data138w[] = ( data[27..27], data[11..11]);
	w_data150w[] = ( data[28..28], data[12..12]);
	w_data162w[] = ( data[29..29], data[13..13]);
	w_data174w[] = ( data[30..30], data[14..14]);
	w_data186w[] = ( data[31..31], data[15..15]);
	w_data18w[] = ( data[17..17], data[1..1]);
	w_data30w[] = ( data[18..18], data[2..2]);
	w_data42w[] = ( data[19..19], data[3..3]);
	w_data4w[] = ( data[16..16], data[0..0]);
	w_data54w[] = ( data[20..20], data[4..4]);
	w_data66w[] = ( data[21..21], data[5..5]);
	w_data78w[] = ( data[22..22], data[6..6]);
	w_data90w[] = ( data[23..23], data[7..7]);
	w_result103w = w_result109w;
	w_result109w = ((sel_node[] & w_data102w[1..1]) # ((! sel_node[]) & w_data102w[0..0]));
	w_result115w = w_result121w;
	w_result11w = ((sel_node[] & w_data4w[1..1]) # ((! sel_node[]) & w_data4w[0..0]));
	w_result121w = ((sel_node[] & w_data114w[1..1]) # ((! sel_node[]) & w_data114w[0..0]));
	w_result127w = w_result133w;
	w_result133w = ((sel_node[] & w_data126w[1..1]) # ((! sel_node[]) & w_data126w[0..0]));
	w_result139w = w_result145w;
	w_result145w = ((sel_node[] & w_data138w[1..1]) # ((! sel_node[]) & w_data138w[0..0]));
	w_result151w = w_result157w;
	w_result157w = ((sel_node[] & w_data150w[1..1]) # ((! sel_node[]) & w_data150w[0..0]));
	w_result163w = w_result169w;
	w_result169w = ((sel_node[] & w_data162w[1..1]) # ((! sel_node[]) & w_data162w[0..0]));
	w_result175w = w_result181w;
	w_result181w = ((sel_node[] & w_data174w[1..1]) # ((! sel_node[]) & w_data174w[0..0]));
	w_result187w = w_result193w;
	w_result193w = ((sel_node[] & w_data186w[1..1]) # ((! sel_node[]) & w_data186w[0..0]));
	w_result19w = w_result25w;
	w_result25w = ((sel_node[] & w_data18w[1..1]) # ((! sel_node[]) & w_data18w[0..0]));
	w_result31w = w_result37w;
	w_result37w = ((sel_node[] & w_data30w[1..1]) # ((! sel_node[]) & w_data30w[0..0]));
	w_result43w = w_result49w;
	w_result49w = ((sel_node[] & w_data42w[1..1]) # ((! sel_node[]) & w_data42w[0..0]));
	w_result55w = w_result61w;
	w_result5w = w_result11w;
	w_result61w = ((sel_node[] & w_data54w[1..1]) # ((! sel_node[]) & w_data54w[0..0]));
	w_result67w = w_result73w;
	w_result73w = ((sel_node[] & w_data66w[1..1]) # ((! sel_node[]) & w_data66w[0..0]));
	w_result79w = w_result85w;
	w_result85w = ((sel_node[] & w_data78w[1..1]) # ((! sel_node[]) & w_data78w[0..0]));
	w_result91w = w_result97w;
	w_result97w = ((sel_node[] & w_data90w[1..1]) # ((! sel_node[]) & w_data90w[0..0]));
END;
--VALID FILE