pciscc_drv.h

高速同步串口芯片PEB20534的驱动程序

/* GPP Interrupt Vector */
#define GPPIV_GPDATA	0x00000001
#define GPPIV_SRCID		0x10000000
#define GPPIV_SRCIDVAL	0x0f

/* TX state definition */
#define	TX_RESET		0
#define TX_IDLE			1
#define	TX_DELAY		2
#define	TX_XMIT			3
#define TX_TAIL			4
#define TX_CAL			5
#define	TX_STALL		6

/* TX descriptor */
struct tx_desc {
	ULONG			flags;
#define NO		0x00010000			/* number of bytes */
#define HI		0x20000000			/* host initiated interrupt */
#define HOLD	0x40000000			/* last descriptor in chain */
#define FE		0x80000000			/* frame end */
	ULONG			nextptr;
	ULONG			dataptr;
	ULONG			result;
#define C			0x40000000		/* descriptor complete flag */
	L1FRAME			*l1_frame;		/* pointer to frame buffer */
	struct tx_desc	*next;			/* note virtaddr */
	struct tx_desc	*prev;
};

/* RX descriptor */
struct rx_desc {
	ULONG			flags;
#define RA		0x00000200			/* receive abort */
	ULONG			nextptr;		/* note busaddr */
	ULONG			dataptr;
	ULONG			result;
	ULONG			feptr;
	L1FRAME			*l1_frame;		/* pointer to frame buffer */
	struct rx_desc	*next;			/* note virtaddr */
	struct rx_desc	*prev;			/* previous */
};

/* chip communication buffers */
typedef struct {
	ULONG			iq_per[CFG_IQLEN];		/* IQ_PER/IQ_CFG buffer */
	ULONG			iq_cfg[CFG_IQLEN];
	ULONG			iq_rx[4][CFG_IQLEN];	/* IQ_RX/IQ_TX buffer */
	ULONG			iq_tx[4][CFG_IQLEN];
	struct rx_desc	dq_rx[4][CFG_RX_DESC];	/* RX/TX descriptors */
	struct tx_desc	dq_tx[4][CFG_TX_DESC];
	PCHAR			dummy[256];				/* dummy buffer */
} DMA_BUFFERS, *PDMA_BUFFERS;

/* channel data/state */
typedef struct {
	L1_STATISTICS	stats;			/* statistics */
	ULONG			initialized;	/* channel initialized? */
	PULONG			iq_rx;			/* interrupt queues */
	PULONG			iq_tx;
	PULONG			iq_rx_next;		/* next entry to be processed */
	PULONG			iq_tx_next;
	struct rx_desc	*dq_rx;			/* RX descriptor queue */
	struct rx_desc	*dq_rx_next;
	struct tx_desc	*dq_tx;			/* TX descriptor queue */
	struct tx_desc	*dq_tx_last;
	struct tx_desc	*dq_tx_cleanup;
	ULONG			tx_enqueued;	/* number of enqueued TX frames */
	ULONG			bitrate;		/* effective bitrate */
	ULONG			mode;			/* mode flags */
	volatile ULONG	txstate;
	volatile ULONG	rx_mailbox;		/* communication with isr */
	volatile ULONG	tx_mailbox;		/* communication with isr */
	ULONG			ccr0;			/* SCC register contents */
	ULONG			ccr1;
	ULONG			ccr2;
} CHANNEL_INFO, *PCHANNEL_INFO;

/* driver local data structure */
typedef struct {
    IO_REMOVE_LOCK      RemoveLock;		/* PNP device remove lock */
    PDEVICE_OBJECT      NextLowerDrv;	/* top of the stack */
    PHYSICAL_ADDRESS	Address;		/* base address */
	ULONG				AddrLen;		/* address space length */
    PVOID				MappedAddress;	/* mapped base address */
	KIRQL				IrqLevel;		/* IRQ level */
	ULONG				IrqVector;		/* IRQ vector */
	KAFFINITY			IrqAffinity;	/* IRQ affinity */
	PKINTERRUPT			IrqObject;		/* IRQ object */
	KSPIN_LOCK			Lock;			/* shared access lock */
	KDPC				TxResetDpc;		/* TX underrun reset DPC */
	KDPC				IsrDpc;			/* TX/RX ISR bottom half */
	PULONG				iq_per;			/* peripheral interrupt queue */
	PULONG				iq_cfg;			/* configuration interrupt queue */
	PULONG				iq_per_next;	/* next entry to be processed */
	PULONG				iq_cfg_next;
	ULONG				initialized;	/* chip initialized? */
	volatile ULONG		mailbox;		/* communication with isr */
#define MAILBOX_NONE	0
#define MAILBOX_OK		1
#define MAILBOX_FAILURE	2
	ULONG				OpenCnt;		/* open driver handles */
	ULONG				ReadMode;		/* blocking/non-blocking read */
	LIST_ENTRY			RxQueue;		/* receiver frame list */
	LIST_ENTRY			RxPending;		/* Pending IRP list */
	CHANNEL_INFO		Channel[4];		/* channel specific data */
	PDMA_BUFFERS		DmaBuffers;		/* chip communication buffers */
} LOCAL_DEVICE_INFO, *PLOCAL_DEVICE_INFO;

/* xmit synchronization call structure */
typedef struct {
	PLOCAL_DEVICE_INFO	pLDI;
	L1FRAME				*tx_frame;
} XMIT_SYNC_INFO, *PXMIT_SYNC_INFO;

/* calib synchronization call structure */
typedef struct {
	PLOCAL_DEVICE_INFO	pLDI;
	ULONG				chan;
	ULONG				time;
} CALIB_SYNC_INFO, *PCALIB_SYNC_INFO;

/* function prototypes */
NTSTATUS	DriverEntry(			IN  PDRIVER_OBJECT DriverObject,
									IN  PUNICODE_STRING RegistryPath);

NTSTATUS	pciscc_add_device(		IN	PDRIVER_OBJECT DriverObject,
									IN	PDEVICE_OBJECT PhysicalDeviceObject);

NTSTATUS	pciscc_pnp(				IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_power(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_sysctl(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_create(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_close(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_read(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_write(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_ioctl(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

VOID		pciscc_unload(			IN	PDRIVER_OBJECT DriverObject);

VOID		pciscc_cancel(			IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_complete(		IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp,
									IN	PVOID Context);

VOID		pciscc_clear_rxlist(	IN	PLOCAL_DEVICE_INFO pLDI);

VOID		pciscc_clear_rxpending(	IN	PLOCAL_DEVICE_INFO pLDI);

PVOID		pciscc_alloc(			IN	ULONG uSize);

VOID		pciscc_free(			IN	PVOID BaseAddr);

ULONG		ReadL(					IN	PLOCAL_DEVICE_INFO pLDI, 
									IN	ULONG Offset);

VOID		WriteL(					IN	PLOCAL_DEVICE_INFO pLDI, 
									IN	ULONG Offset,
									IN	ULONG Value);

ULONG		VirtToPhys(				IN	PVOID Address);

NTSTATUS	pciscc_2k_config(		IN	PDEVICE_OBJECT pDO,
									IN	PIRP pIrp);

NTSTATUS	pciscc_init_queues(		IN	PLOCAL_DEVICE_INFO pLDI,
									IN	ULONG chan);

NTSTATUS	pciscc_chip_open(		IN	PLOCAL_DEVICE_INFO pLDI);

VOID		pciscc_chip_close(		IN	PLOCAL_DEVICE_INFO pLDI);

NTSTATUS	pciscc_channel_open(	IN	PLOCAL_DEVICE_INFO pLDI,
									IN	ULONG chan,
									IN	ULONG bitrate,
									IN	ULONG mode);

VOID		pciscc_channel_close(	IN	PLOCAL_DEVICE_INFO pLDI,
									IN	ULONG chan);

VOID		pciscc_set_baud(		IN	PLOCAL_DEVICE_INFO pLDI,
									IN	ULONG chan,
									IN	ULONG rate);

ULONG		pciscc_state(			IN	PLOCAL_DEVICE_INFO pLDI,
									IN	ULONG chan);

BOOLEAN		pciscc_calib_sync(		IN	PCALIB_SYNC_INFO pInfo);

BOOLEAN		pciscc_xmit_sync(		IN	PXMIT_SYNC_INFO pInfo);

BOOLEAN		pciscc_isr(				IN	PKINTERRUPT Interrupt,
									IN	PVOID ServiceContext);

VOID		pciscc_dpc_txreset(		IN	PKDPC Dpc,
									IN	PDEVICE_OBJECT pDO,
									IN	PVOID SystemArgument1,
									IN	PVOID SystemArgument2);

VOID		pciscc_dpc_isr(			IN	PKDPC Dpc,
									IN	PDEVICE_OBJECT pDO,
									IN	PVOID SystemArgument1,
									IN	PVOID SystemArgument2);

#endif	/* _PCISCC_H_ */