📄 stklcd.lst
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(0164) // Returns:
(0165) // (nothing)
(0166) //
(0167) static void LCD_write(UInt8 val, UInt8 sel)
(0168) {
(0169) MCUCR = 0xC0;
01A0 EC80 LDI R24,0xC0
01A1 BF85 OUT P35,R24
(0170) switch (sel) {
01A2 2F42 MOV R20,R18
01A3 2755 CLR R21
01A4 3040 CPI R20,0
01A5 0745 CPC R20,R21
01A6 F029 BEQ 0x01AC
01A7 3041 CPI R20,1
01A8 E0E0 LDI R30,0
01A9 075E CPC R21,R30
01AA F021 BEQ 0x01AF
01AB C005 RJMP 0x01B1
(0171) case CMD: *CMD_IO = val; break;
01AC 93008000 STS 0x8000,R16
01AE C002 RJMP 0x01B1
(0172) case DATA: *DATA_IO = val; break;
01AF 9300C000 STS 0xC000,R16
(0173) }
(0174) }
01B1 D243 RCALL pop_gset1
01B2 9508 RET
_LCD_read:
rVal --> R20
sel --> R16
01B3 D23E RCALL push_gset1
(0175)
(0176) //
(0177) // Function Name:
(0178) // LCD_read
(0179) //
(0180) // Description:
(0181) // Read data or cmd to HD44780U
(0182) //
(0183) // Parameters:
(0184) // sel = data / cmd
(0185) // 0 - cmd read
(0186) // 1 - data read
(0187) //
(0188) // Returns:
(0189) // data read from LCD
(0190) //
(0191) static UInt8 LCD_read(UInt8 sel)
(0192) {
(0193) UInt8 rVal;
(0194) MCUCR = 0xC0;
01B4 EC80 LDI R24,0xC0
01B5 BF85 OUT P35,R24
(0195) switch (sel) {
01B6 2F40 MOV R20,R16
01B7 2755 CLR R21
01B8 3040 CPI R20,0
01B9 0745 CPC R20,R21
01BA F029 BEQ 0x01C0
01BB 3041 CPI R20,1
01BC E0E0 LDI R30,0
01BD 075E CPC R21,R30
01BE F021 BEQ 0x01C3
01BF C005 RJMP 0x01C5
(0196) case CMD: rVal = *CMD_IO; break;
01C0 91408000 LDS R20,0x8000
01C2 C002 RJMP 0x01C5
(0197) case DATA: rVal = *DATA_IO; break;
01C3 9140C000 LDS R20,0xC000
(0198) }
(0199) return rVal;
01C5 2F04 MOV R16,R20
01C6 D22E RCALL pop_gset1
01C7 9508 RET
(0200) }
(0201)
(0202) //
(0203) // Function Name:
(0204) // LCD_busy_test
(0205) //
(0206) // Description:
(0207) // Test if the LCD is busy or not
(0208) //
(0209) // Parameters:
(0210) // (none)
(0211) //
(0212) // Returns:
(0213) // (nothing)
(0214) //
(0215) static void LCD_busy_test(void)
(0216) {
(0217) while (LCD_read(CMD) & 0x80);
_LCD_busy_test:
01C8 2700 CLR R16
01C9 DFE9 RCALL _LCD_read
01CA FD07 SBRC R16,7
01CB CFFC RJMP _LCD_busy_test
(0218) }
01CC 9508 RET
FILE: E:\work\avr\icc\cpld\stklcd\t0.c
(0001) //
(0002) // File Name: t0.c
(0003) //
(0004) // Title: Internal timer 0 implementation
(0005) //
(0006) // Description:
(0007) //
(0008) // Creation Date: 2/6/00 5:31:06 PM
(0009) //
(0010) // By: A.C. Verbeck
(0011) //
(0012) // This file is subject to the terms and conditions of the GNU General Public
(0013) // License. See the file COPYING in the main directory of this archive
(0014) // for more details.
(0015) //
(0016)
(0017) #include <io8515v.h>
(0018) #include <stdio.h>
(0019) #include <macros.h>
(0020)
(0021) #include "Basetype.h"
(0022) #include "t0.h"
(0023)
(0024) #pragma interrupt_handler t0_isr:8;
(0025)
(0026) //
(0027) // Local defines
(0028) //
(0029) #define MAX_CT 0xFF // Max count that can be assigned
(0030) #define _1MS 0x3f // 1.008mS delay time
(0031) #define _2MS 0x7D // 2mS delay time (exact)
(0032) #define _4MS 0xFA // 4mS delay time (exact)
(0033)
(0034) //
(0035) // Local data
(0036) //
(0037) UInt16 timer_ct = 0; // Current timer count
(0038) UInt16 timer_set = 0; // Timer time out value
(0039)
(0040) //
(0041) // Local functions
(0042) //
(0043) static void t0_isr(void);
(0044)
(0045) //
(0046) // Function Name:
(0047) // T0_init
(0048) //
(0049) // Description:
(0050) // Initialize internal timer 0.
(0051) // - set divider to ck/64
(0052) // - set count to 63
(0053) // - this gives a 1.008mS interrupt interval (992Hz)
(0054) //
(0055) // Parameters:
(0056) // (none)
(0057) //
(0058) // Returns:
(0059) // (nothing)
(0060) //
(0061) void T0_init(void)
(0062) {
(0063) CLI(); // Interrupts OFF
_T0_init:
01CD 94F8 BCLR 7
(0064) TCCR0 = 0x03; // Set divider to ck/64
01CE E083 LDI R24,3
01CF BF83 OUT P33,R24
(0065) TCNT0 = (MAX_CT-_1MS); // Set the time out
01D0 EC80 LDI R24,0xC0
01D1 BF82 OUT P32,R24
(0066) TIMSK |= 0x02; // Enable the interrupt
01D2 B789 IN R24,P39
01D3 6082 ORI R24,2
01D4 BF89 OUT P39,R24
(0067)
(0068) timer_ct = 0; // Init the soft timer
01D5 2422 CLR R2
01D6 2433 CLR R3
01D7 9230007E STS 0x7E,R3
01D9 9220007D STS 0x7D,R2
(0069) SEI(); // Interrupts ON
01DB 9478 BSET 7
(0070) }
01DC 9508 RET
(0071)
(0072) void T0_clear(void)
(0073) {
(0074) timer_ct = 0;
_T0_clear:
01DD 2422 CLR R2
01DE 2433 CLR R3
01DF 9230007E STS 0x7E,R3
01E1 9220007D STS 0x7D,R2
(0075) }
01E3 9508 RET
(0076)
(0077)
(0078) //
(0079) // Function Name:
(0080) // T0_set
(0081) //
(0082) // Description:
(0083) // Set the next timeout for the internal timer 0.
(0084) // Note that this code works even if the timer
(0085) // "rolls over".
(0086) //
(0087) // Parameters:
(0088) // UInt16 time_out - the wakeup time
(0089) //
(0090) // Returns:
(0091) // (nothing)
(0092) //
(0093) void T0_set(UInt16 time_out)
(0094) {
(0095) CLI(); // Interrupts OFF
_T0_set:
time_out --> R16
01E4 94F8 BCLR 7
(0096) timer_ct = 0; // Clear the timer count to 0
01E5 2422 CLR R2
01E6 2433 CLR R3
01E7 9230007E STS 0x7E,R3
01E9 9220007D STS 0x7D,R2
(0097) timer_set = time_out; // Set the new timeout
01EB 93100080 STS 0x80,R17
01ED 9300007F STS 0x7F,R16
(0098) SEI(); // Interrupts ON
01EF 9478 BSET 7
(0099) }
01F0 9508 RET
(0100) UInt16 T0_get(void)
(0101) {
(0102) return timer_ct;
_T0_get:
01F1 9100007D LDS R16,0x7D
01F3 9110007E LDS R17,0x7E
01F5 9508 RET
(0103) }
(0104)
(0105)
(0106) void T0_enable(void)
(0107) {
(0108) TIMSK |= 0x02; // Enable the interrupt
_T0_enable:
01F6 B789 IN R24,P39
01F7 6082 ORI R24,2
01F8 BF89 OUT P39,R24
(0109) }
01F9 9508 RET
(0110) void T0_disable(void)
(0111) {
(0112) TIMSK &= ~0x02; // Disable the interrupt
_T0_disable:
01FA B789 IN R24,P39
01FB 7F8D ANDI R24,0xFD
01FC BF89 OUT P39,R24
(0113) }
01FD 9508 RET
(0114)
(0115) void T0_sleep(UInt16 time_out)
(0116) {
(0117) CLI(); // Interrupts OFF
_T0_sleep:
time_out --> R16
01FE 94F8 BCLR 7
(0118) timer_ct = 0; // Clear the timer count to 0
01FF 2422 CLR R2
0200 2433 CLR R3
0201 9230007E STS 0x7E,R3
0203 9220007D STS 0x7D,R2
(0119) timer_set = time_out; // Set the new timeout
0205 93100080 STS 0x80,R17
0207 9300007F STS 0x7F,R16
(0120) SEI(); // Interrupts ON
0209 9478 BSET 7
(0121) while (timer_ct != timer_set); // Just wait here
020A 9020007F LDS R2,0x7F
020C 90300080 LDS R3,0x80
020E 9040007D LDS R4,0x7D
0210 9050007E LDS R5,0x7E
0212 1442 CP R4,R2
0213 0453 CPC R5,R3
0214 F7A9 BNE 0x020A
(0122) }
0215 9508 RET
_t0_isr:
0216 938A ST R24,-Y
0217 939A ST R25,-Y
0218 B78F IN R24,P3F
0219 938A ST R24,-Y
(0123)
(0124) static void t0_isr(void)
(0125) {
(0126) ++timer_ct; // Boost the software timer
021A 9180007D LDS R24,0x7D
021C 9190007E LDS R25,0x7E
021E 9601 ADIW R24,1
021F 9390007E STS 0x7E,R25
0221 9380007D STS 0x7D,R24
(0127) TCNT0 = (MAX_CT-_1MS); // Set the time out
0223 EC80 LDI R24,0xC0
0224 BF82 OUT P32,R24
(0128) }
FILE: <library>
0225 9189 LD R24,Y+
0226 BF8F OUT P3F,R24
0227 9199 LD R25,Y+
0228 9189 LD R24,Y+
0229 9518 RETI
__print:
022A D1A4 RCALL push_arg4
022B D1E6 RCALL push_gset5
022C 9728 SBIW R28,0x8
022D 2400 CLR R0
022E 2411 CLR R1
022F 820C STD R0,4+Y
0230 821D STD R1,5+Y
0231 C188 RJMP 0x03BA
0232 89EC LDD R30,20+Y
0233 89FD LDD R31,21+Y
0234 8180 LDD R24,0+Z
0235 3285 CPI R24,0x25
0236 F059 BEQ 0x0242
0237 8100 LDD R16,0+Z
0238 2711 CLR R17
0239 89EA LDD R30,18+Y
023A 89FB LDD R31,19+Y
023B D1D9 RCALL xicall
023C 818C LDD R24,4+Y
023D 819D LDD R25,5+Y
023E 9601 ADIW R24,1
023F 838C STD R24,4+Y
0240 839D STD R25,5+Y
0241 C173 RJMP 0x03B5
0242 24EE CLR R14
0243 24FF CLR R15
0244 EE47 LDI R20,0xE7
0245 E050 LDI R21,0
0246 E260 LDI R22,0x20
0247 898C LDD R24,20+Y
0248 899D LDD R25,21+Y
0249 9601 ADIW R24,1
024A 8B8C STD R24,20+Y
024B 8B9D STD R25,21+Y
024C 89EC LDD R30,20+Y
024D 89FD LDD R31,21+Y
024E 8020 LDD R2,0+Z
024F 2433 CLR R3
0250 822A STD R2,2+Y
0251 823B STD R3,3+Y
0252 818A LDD R24,2+Y
0253 819B LDD R25,3+Y
0254 3588 CPI R24,0x58
0255 E0E0 LDI R30,0
0256 079E CPC R25,R30
0257 F409 BNE 0x0259
0258 C087 RJMP 0x02E0
0259 E588 LDI R24,0x58
025A E090 LDI R25,0
025B 1582 CP R24,R2
025C 0593 CPC R25,R3
025D F0A4 BLT 0x0272
025E 818A LDD R24,2+Y
025F 819B LDD R25,3+Y
0260 3485 CPI R24,0x45
0261 E0E0 LDI R30,0
0262 079E CPC R25,R30
0263 F409 BNE 0x0265
0264 C14B RJMP 0x03B0
0265 3485 CPI R24,0x45
0266 E0E0 LDI R30,0
0267 079E CPC R25,R30
0268 F40C BGE 0x026A
0269 C03F RJMP 0x02A9
026A 818A LDD R24,2+Y
026B 819B LDD R25,3+Y
026C 3583 CPI R24,0x53
026D E0E0 LDI R30,0
026E 079E CPC R25,R30
026F F409 BNE 0x0271
0270 C0DA RJMP 0x034B
0271 C037 RJMP 0x02A9
0272 818A LDD R24,2+Y
0273 819B LDD R25,3+Y
0274 368F CPI R24,0x6F
0275 E0E0 LDI R30,0
0276 079E CPC R25,R30
0277 F409 BNE 0x0279
0278 C067 RJMP 0x02E0
0279 E68F LDI R24,0x6F
027A E090 LDI R25,0
027B 802A LDD R2,2+Y
027C 803B LDD R3,3+Y
027D 1582 CP R24,R2
027E 0593 CPC R25,R3
027F F0BC BLT 0x0297
0280 818A LDD R24,2+Y
0281 819B LDD R25,3+Y
0282 3683 CPI R24,0x63
0283 E0E0 LDI R30,0
0284 079E CPC R25,R30
0285 F409 BNE 0x0287
0286 C0AD RJMP 0x0334
0287 3684 CPI R24,0x64
0288 E0E0 LDI R30,0
0289 079E CPC R25,R30
028A F409 BNE 0x028C
028B C02A RJMP 0x02B6
028C 3685 CPI R24,0x65
028D E0E0 LDI R30,0
028E 079E CPC R25,R30
028F F409 BNE 0x0291
0290 C11F RJMP 0x03B0
0291 3686 CPI R24,0x66
0292 E0E0 LDI R30,0
0293 079E CPC R25,R30
0294 F409 BNE 0x0296
0295 C11A RJMP 0x03B0
0296 C012 RJMP 0x02A9
0297 818A LDD R24,2+Y
0298 819B LDD R25,3+Y
0299 3783 CPI R24,0x73
029A E0E0 LDI R30,0
029B 079E CPC R25,R30
029C F409 BNE 0x029E
029D C0DC RJMP 0x037A
029E 3785 CPI R24,0x75
029F E0E0 LDI R30,0
02A0 079E CPC R25,R30
02A1 F409 BNE 0x02A3
02A2 C03D RJMP 0x02E0
02A3 3788 CPI R24,0x78
02A4 E0E0 LDI R30,0
02A5 079E CPC R25,R30
02A6 F409 BNE 0x02A8
02A7 C038 RJMP 0x02E0
02A8 C000 RJMP 0x02A9
02A9 89EC LDD R30,20+Y
02AA 89FD LDD R31,21+Y
02AB 8100 LDD R16,0+Z
02AC 2711 CLR R17
02AD 89EA LDD R30,18+Y
02AE 89FB LDD R31,19+Y
02AF D165 RCALL xicall
02B0 818C LDD R24,4+Y
02B1 819D LDD R25,5+Y
02B2 9601 ADIW R24,1
02B3 838C STD R24,4+Y
02B4 839D STD R25,5+Y
02B5 C0FF RJMP 0x03B5
02B6 898E LDD R24,22+Y
02B7 899F LDD R25,23+Y
02B8 9602 ADIW R24,2
02B9 8B8E STD R24,22+Y
02BA 8B9F STD R25,23+Y
02BB 89EE LDD R30,22+Y
02BC 89FF LDD R31,23+Y
02BD 9732 SBIW R30,2
02BE 8020 LDD R2,0+Z
02BF 8031 LDD R3,1+Z
02C0 822E STD R2,6+Y
02C1 823F STD R3,7+Y
02C2 818E LDD R24,6+Y
02C3 819F LDD R25,7+Y
02C4 3080 CPI R24,0
02C5 E0E0 LDI R30,0
02C6 079E CPC R25,R30
02C7 F474 BGE 0x02D6
02C8 2D8E MOV R24,R14
02C9 2D9F MOV R25,R15
02CA 6088 ORI R24,0x8
02CB 2EE8 MOV R14,R24
02CC 2EF9 MOV R15,R25
02CD E26D LDI R22,0x2D
02CE 818E LDD R24,6+Y
02CF 819F LDD R25,7+Y
02D0 9580 COM R24
02D1 9590 COM R25
02D2 5F8F SUBI R24,0xFF
02D3 4F9F SBCI R25,0xFF
02D4 838E STD R24,6+Y
02D5 839F STD R25,7+Y
02D6 E08A LDI R24,0xA
02D7 E090 LDI R25,0
02D8 8388 STD R24,0+Y
02D9 8399 STD R25,1+Y
02DA 812E LDD R18,6+Y
02DB 813F LDD R19,7+Y
02DC 2F04 MOV R16,R20
02DD 2F15 MOV R17,R21
02DE D148 RCALL _itoa
02DF C04F RJMP 0x032F
02E0 898E LDD R24,22+Y
02E1 899F LDD R25,23+Y
02E2 9602 ADIW R24,2
02E3 8B8E STD R24,22+Y
02E4 8B9F STD R25,23+Y
02E5 89EE LDD R30,22+Y
02E6 89FF LDD R31,23+Y
02E7 9732 SBIW R30,2
02E8 8020 LDD R2,0+Z
02E9 8031 LDD R3,1+Z
02EA 822E STD R2,6+Y
02EB 823F STD R3,7+Y
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