📄 16qam.restore
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HandleException { AddImportedFiles $iProjHelper $imported_files $origination } "A problem occured while restoring imported files." set process_props { "A" "" "" "" "PROPEXT_SynthMultStyle_virtex2" "Auto" "A" "" "" "" "PROPEXT_xilxBitgCfg_DCIUpdateMode_spartan3" "As Required" "A" "" "" "" "PROPEXT_xilxBitgCfg_Rate_virtex4" "4" "A" "" "" "" "PROPEXT_xilxMapGenInputK_virtex2" "4" "A" "" "" "" "PROPEXT_xilxSynthAddBufg_virtex4" "32" "A" "" "" "" "PROPEXT_xilxSynthMaxFanout_virtex2" "500" "A" "" "" "" "PROPEXT_xstUseClockEnable_virtex4" "Auto" "A" "" "" "" "PROPEXT_xstUseSyncReset_virtex4" "Auto" "A" "" "" "" "PROPEXT_xstUseSyncSet_virtex4" "Auto" "A" "" "" "" "PROP_AutoGenFile" "false" "A" "" "" "" "PROP_BehavioralSimTop" "Module|test_qam16_v" "A" "" "" "" "PROP_CompxlibOtherCompxlibOpts" "" "A" "" "" "" "PROP_CompxlibOutputDir" "$XILINX/<language>/<simulator>" "A" "" "" "" "PROP_CompxlibOverwriteLib" "Overwrite" "A" "" "" "" "PROP_CompxlibSimPrimatives" "true" "A" "" "" "" "PROP_CompxlibXlnxCoreLib" "true" "A" "" "" "" "PROP_ConstFileAddOption" "true" "A" "" "" "" "PROP_ConstFileName" "" "A" "" "" "" "PROP_CorgenRegenCore" "Under Current Project Setting" "A" "" "" "" "PROP_CurrentFloorplanFile" "" "A" "" "" "" "PROP_DefaultTBName" "Default" "A" "" "" "" "PROP_DesignName" "16QAM" "A" "" "" "" "PROP_Dummy" "dum1" "A" "" "" "" "PROP_Enable_Incremental_Messaging" "false" "A" "" "" "" "PROP_Enable_Message_Capture" "true" "A" "" "" "" "PROP_Enable_Message_Filtering" "false" "A" "" "" "" "PROP_FitterReportFormat" "HTML" "A" "" "" "" "PROP_FlowDebugLevel" "0" "A" "" "" "" "PROP_HierarchicalProjectType" "N/A" "A" "" "" "" "PROP_ISimLibSearchOrderFile" "" "A" "" "" "" "PROP_ISimOtherCompilerOptions_behav" "" "A" "" "" "" "PROP_ISimOtherCompilerOptions_fit" "" "A" "" "" "" "PROP_ISimOtherCompilerOptions_par" "" "A" "" "" "" "PROP_ISimSDFTimingToBeRead" "Setup Time" "A" "" "" "" "PROP_ISimSpecifyDefMacroAndValueChkSyntax" "" "A" "" "" "" "PROP_ISimSpecifySearchDirectoryChkSyntax" "" "A" "" "" "" "PROP_ISimUseCustomCompilationOrder" "false" "A" "" "" "" "PROP_ISimUseCustomSimCmdFile_behav_tb" "false" "A" "" "" "" "PROP_ISimUseCustomSimCmdFile_behav_tbw" "false" "A" "" "" "" "PROP_ISimUseCustomSimCmdFile_gen_tbw" "false" "A" "" "" "" "PROP_ISimUseCustomSimCmdFile_launch" "false" "A" "" "" "" "PROP_ISimUseCustomSimCmdFile_par_tb" "false" "A" "" "" "" "PROP_ISimUseCustomSimCmdFile_par_tbw" "false" "A" "" "" "" "PROP_ISimUutInstName" "UUT" "A" "" "" "" "PROP_ImpactProjectFile" "Default" "A" "" "" "" "PROP_LastAppliedGoal" "Balanced" "A" "" "" "" "PROP_LastAppliedStrategy" "Xilinx Default (unlocked)" "A" "" "" "" "PROP_LastUnlockStatus" "false" "A" "" "" "" "PROP_LoadPostTrceTSIFile" "false" "A" "" "" "" "PROP_MSimSDFTimingToBeRead" "Setup Time" "A" "" "" "" "PROP_MapGlobalOptimization" "false" "A" "" "" "" "PROP_ModelSimUseConfigName" "false" "A" "" "" "" "PROP_OverwriteSym" "false" "A" "" "" "" "PROP_Parse_Edif_Module" "false" "A" "" "" "" "PROP_Parse_Target" "synthesis" "A" "" "" "" "PROP_PartitionCreateDelete" "" "A" "" "" "" "PROP_PartitionForcePlacement" "" "A" "" "" "" "PROP_PartitionForceSynth" "" "A" "" "" "" "PROP_PartitionForceTranslate" "" "A" "" "" "" "PROP_PostMapSimTop" "Module|test_ddsqam_v" "A" "" "" "" "PROP_PostParSimTop" "Module|test_ddsqam_v" "A" "" "" "" "PROP_PostSynthSimTop" "Module|test_ddsqam_v" "A" "" "" "" "PROP_PostTrceFastPath" "false" "A" "" "" "" "PROP_PostTrceGenDatasheet" "true" "A" "" "" "" "PROP_PostTrceGenTimegroups" "false" "A" "" "" "" "PROP_PostXlateSimTop" "Module|test_ddsqam_v" "A" "" "" "" "PROP_PreTrceFastPath" "false" "A" "" "" "" "PROP_PreTrceGenDatasheet" "true" "A" "" "" "" "PROP_PreTrceGenTimegroups" "false" "A" "" "" "" "PROP_PreTrceTSIFile" "" "A" "" "" "" "PROP_PrecAddIOPads" "true" "A" "" "" "" "PROP_PrecAdvFsmOptimization" "true" "A" "" "" "" "PROP_PrecArrayBoundsCheck" "false" "A" "" "" "" "PROP_PrecCreateUcfFromRtlConstraints" "false" "A" "" "" "" "PROP_PrecEdif" "true" "A" "" "" "" "PROP_PrecFsmEncoding" "Auto" "A" "" "" "" "PROP_PrecFullCase" "false" "A" "" "" "" "PROP_PrecInputSdcFile" "" "A" "" "" "" "PROP_PrecOutputFileBase" "" "A" "" "" "" "PROP_PrecParallelCase" "false" "A" "" "" "" "PROP_PrecResourceSharing" "true" "A" "" "" "" "PROP_PrecRptCriticalPaths" "true" "A" "" "" "" "PROP_PrecRptMissingConstraints" "false" "A" "" "" "" "PROP_PrecRptTimingSummary" "true" "A" "" "" "" "PROP_PrecRptTimingViolations" "true" "A" "" "" "" "PROP_PrecRptclockFreq" "true" "A" "" "" "" "PROP_PrecRunRetiming" "false" "A" "" "" "" "PROP_PrecShowClockDomainCrossing" "false" "A" "" "" "" "PROP_PrecShowNetFanOut" "true" "A" "" "" "" "PROP_PrecTranSetResetToLatches" "true" "A" "" "" "" "PROP_PrecUseSafeFsm" "false" "A" "" "" "" "PROP_PrecVerilog" "false" "A" "" "" "" "PROP_PrecVhdl" "false" "A" "" "" "" "PROP_PrecVhdlSyntax" "VHDL 93" "A" "" "" "" "PROP_ProjectGeneratorType" "ProjNav" "A" "" "" "" "PROP_SimDo" "true" "A" "" "" "" "PROP_SimModelGenerateTestbenchFile" "false" "A" "" "" "" "PROP_SimModelInsertBuffersPulseSwallow" "false" "A" "" "" "" "PROP_SimModelOtherNetgenOpts" "" "A" "" "" "" "PROP_SimModelRetainHierarchy" "true" "A" "" "" "" "PROP_SimUseCustom_behav" "false" "A" "" "" "" "PROP_SimUseCustom_launchMSim" "false" "A" "" "" "" "PROP_SimUseCustom_postMap" "false" "A" "" "" "" "PROP_SimUseCustom_postPar" "false" "A" "" "" "" "PROP_SimUseCustom_postXlate" "false" "A" "" "" "" "PROP_SimUserCompileList_launchMSim" "" "A" "" "" "" "PROP_StartImpView" "" "A" "" "" "" "PROP_StopImpView" "AbstractSynthesis" "A" "" "" "" "PROP_SynthCaseImplStyle" "None" "A" "" "" "" "PROP_SynthDecoderExtract" "true" "A" "" "" "" "PROP_SynthDisableIOInsertion" "false" "A" "" "" "" "PROP_SynthEncoderExtract" "Yes" "A" "" "" "" "PROP_SynthEnumEncoding" "default" "A" "" "" "" "PROP_SynthExtractMux" "Yes" "A" "" "" "" "PROP_SynthExtractRAM" "true" "A" "" "" "" "PROP_SynthExtractROM" "true" "A" "" "" "" "PROP_SynthFanout" "100" "A" "" "" "" "PROP_SynthFsmEncode" "Auto" "A" "" "" "" "PROP_SynthLogicalShifterExtract" "true" "A" "" "" "" "PROP_SynthModular" "false" "A" "" "" "" "PROP_SynthNumCriticalPaths" "0" "A" "" "" "" "PROP_SynthNumStartEndPoints" "0" "A" "" "" "" "PROP_SynthOpt" "Speed" "A" "" "" "" "PROP_SynthOptEffort" "Normal" "A" "" "" "" "PROP_SynthPipelining" "true" "A" "" "" "" "PROP_SynthProcBound" "true" "A" "" "" "" "PROP_SynthResSharing" "true" "A" "" "" "" "PROP_SynthResourceSharing" "true" "A" "" "" "" "PROP_SynthRetiming" "false" "A" "" "" "" "PROP_SynthShiftRegExtract" "true" "A" "" "" "" "PROP_SynthSymbolicFsm" "true" "A" "" "" "" "PROP_SynthTop" "Module|qam16" "A" "" "" "" "PROP_SynthUseFsmExplorerData" "false" "A" "" "" "" "PROP_SynthXORCollapse" "true" "A" "" "" "" "PROP_ToolPathChipscope" "" "A" "" "" "" "PROP_ToolPathLeonardoSpectrum" "" "A" "" "" "" "PROP_ToolPathModelSim" "" "A" "" "" "" "PROP_ToolPathPrecision" "" "A" "" "" "" "PROP_ToolPathSynplify" "" "A" "" "" "" "PROP_ToolPathSynplifyPro" "" "A" "" "" "" "PROP_Top_Level_Module_Type" "HDL" "A" "" "" "" "PROP_UseSmartGuide" "false" "A" "" "" "" "PROP_UserBrowsedStrategyFiles" "" "A" "" "" "" "PROP_UserConstraintEditorPreference" "Constraints Editor" "A" "" "" "" "PROP_UserEditorCustomSetting" "" "A" "" "" "" "PROP_UserEditorPreference" "ISE Text Editor" "A" "" "" "" "PROP_Verilog2001" "true" "A" "" "" "" "PROP_VirtexSynthAutoConstrain" "true" "A" "" "" "" "PROP_WriteVHDLNetlist" "false" "A" "" "" "" "PROP_WriteVendorConstFile" "true" "A" "" "" "" "PROP_WriteVerilogNetlist" "false" "A" "" "" "" "PROP_XPORTInpFileName" "" "A" "" "" "" "PROP_XPORTInpFileType" "ABEL" "A" "" "" "" "PROP_XPORTOutFileType" "VHDL" "A" "" "" "" "PROP_XPORTlistInpFiles" "false" "A" "" "" "" "PROP_XPowerOptInputTclScript" "" "A" "" "" "" "PROP_XPowerOptLoadPCFFile" "Default" "A" "" "" "" "PROP_XPowerOptLoadVCDFile" "Default" "A" "" "" "" "PROP_XPowerOptLoadXMLFile" "Default" "A" "" "" "" "PROP_XPowerOptOutputFile" "Default" "A" "" "" "" "PROP_XPowerOptVerboseRpt" "false" "A" "" "" "" "PROP_XPowerOtherXPowerOpts" "" "A" "" "" "" "PROP_XplorerMode" "Off" "A" "" "" "" "PROP_bitgen_Encrypt_keySeq0" "None" "A" "" "" "" "PROP_bitgen_Encrypt_keySeq1" "None" "A" "" "" "" "PROP_bitgen_Encrypt_keySeq2" "None" "A" "" "" "" "PROP_bitgen_Encrypt_keySeq3" "None" "A" "" "" "" "PROP_bitgen_Encrypt_keySeq4" "None" "A" "" "" "" "PROP_bitgen_Encrypt_keySeq5" "None" "A" "" "" "" "PROP_bitgen_Encrypt_startCBC" "" "A" "" "" "" "PROP_bitgen_Encrypt_startKey" "None" "A" "" "" "" "PROP_bitgen_otherCmdLineOptions" "" "A" "" "" "" "PROP_ibiswriterGeneratePackageParasitics" "false" "A" "" "" "" "PROP_ibiswriterShowAllModels" "false" "A" "" "" "" "PROP_isimCompileForHdlDebug" "true" "A" "" "" "" "PROP_isimIncreCompilation" "true" "A" "" "" "" "PROP_isimSpecifyDefMacroAndValue" "" "A" "" "" "" "PROP_isimSpecifySearchDirectory" "" "A" "" "" "" "PROP_isimValueRangeCheck" "false" "A" "" "" "" "PROP_lockPinsUcfFile" "" "A" "" "" "" "PROP_mapIgnoreTimingConstraints" "false" "A" "" "" "" "PROP_mapTimingAnalyzerLoadDesign" "true" "A" "" "" "" "PROP_mapUseRLOCConstraints" "true" "A" "" "" "" "PROP_map_otherCmdLineOptions" "" "A" "" "" "" "PROP_mpprRsltToCopy" "" "A" "" "" "" "PROP_mpprViewPadRptsForAllRslt" "true" "A" "" "" "" "PROP_mpprViewParRptsForAllRslt" "true" "A" "" "" "" "PROP_ngdbuildUseLOCConstraints" "true" "A" "" "" "" "PROP_ngdbuild_otherCmdLineOptions" "" "A" "" "" "" "PROP_parIgnoreTimingConstraints" "true" "A" "" "" "" "PROP_parTimingAnalyzerLoadDesign" "true" "A" "" "" "" "PROP_parUseTimingConstraints" "true" "A" "" "" "" "PROP_par_otherCmdLineOptions" "" "A" "" "" "" "PROP_primeCorrelateOutput" "false" "A" "" "" "" "PROP_primeFlatternOutputNetlist" "false" "A" "" "" "" "PROP_primeTopLevelModule" "" "A" "" "" "" "PROP_primetimeBlockRamData" "" "A" "" "" "" "PROP_usedsp48" "Auto" "A" "" "" "" "PROP_xilxBitgCfg_Busy" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_Clk" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_Code" "0xFFFFFFFF" "A" "" "" "" "PROP_xilxBitgCfg_Cs" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_DCMBandgap" "false" "A" "" "" "" "PROP_xilxBitgCfg_DCMShutdown" "false" "A" "" "" "" "PROP_xilxBitgCfg_Din" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_Done" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_ASCIIFile" "false" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_BinaryFile" "false" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_BitFile" "true" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_Compress" "false" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_DRC" "true" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_EnableCRC" "true" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_GClkDel0" "11111" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_GClkDel1" "11111" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_GClkDel2" "11111" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_GClkDel3" "11111" "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_IEEE1532File" "false" "A" "" "" "" "PROP_xilxBitgCfg_Init" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_M0" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_M1" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_M2" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_Pgm" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_PwrDown" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_Rdwr" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_TCK" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_TDI" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_TDO" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_TMS" "Pull Up" "A" "" "" "" "PROP_xilxBitgCfg_Unused" "Pull Down" "A" "" "" "" "PROP_xilxBitgReadBk_Sec" "Enable Readback and Reconfiguration" "A" "" "" "" "PROP_xilxBitgStart_Clk" "JTAG Clock" "A" "" "" "" "PROP_xilxBitgStart_Clk_Done" "Default (4)" "A" "" "" "" "PROP_xilxBitgStart_Clk_DriveDone" "false" "A" "" "" "" "PROP_xilxBitgStart_Clk_EnOut" "Default (5)" "A" "" "" "" "PROP_xilxBitgStart_Clk_MatchCycle" "Auto" "A" "" "" "" "PROP_xilxBitgStart_Clk_RelDLL" "Default (NoWait)" "A" "" "" "" "PROP_xilxBitgStart_Clk_RelSet" "Default (6)" "A" "" "" "" "PROP_xilxBitgStart_Clk_WrtEn" "Default (6)" "A" "" "" "" "PROP_xilxBitgStart_IntDone" "false" "A" "" "" "" "PROP_xilxMapAllowLogicOpt" "false" "A" "" "" "" "PROP_xilxMapCoverMode" "Area" "A" "" "" "" "PROP_xilxMapDisableRegOrdering" "false" "A" "" "" "" "PROP_xilxMapPackRegInto" "For Inputs and Outputs" "A" "" "" "" "PROP_xilxMapReplicateLogic" "true" "A" "" "" "" "PROP_xilxMapReportDetail" "false" "A" "" "" "" "PROP_xilxMapSliceLogicInUnusedBRAMs" "false" "A" "" "" "" "PROP_xilxMapTimingDrivenPacking" "false" "A" "" "" "" "PROP_xilxMapTrimUnconnSig" "true" "A" "" "" "" "PROP_xilxNgdbldIOPads" "false" "A" "" "" "" "PROP_xilxNgdbldMacro" "" "A" "" "" "" "PROP_xilxNgdbldNTType" "Timestamp" "A" "" "" "" "PROP_xilxNgdbldPresHierarchy" "false" "A" "" "" "" "PROP_xilxNgdbldUR" "" "A" "" "" "" "PROP_xilxNgdbldUnexpBlks" "false" "A" "" "" "" "PROP_xilxNgdbld_AUL" "false" "A" "" "" "" "PROP_xilxPARplacerCostTable" "1" "A" "" "" "" "PROP_xilxPARplacerEffortLevel" "None" "A" "" "" "" "PROP_xilxPARrouterEffortLevel" "None" "A" "" "" "" "PROP_xilxPARstrat" "Normal Place and Route" "A" "" "" "" "PROP_xilxPARuseBondedIO" "false" "A" "" "" "" "PROP_xilxPostTrceAdvAna" "false" "A" "" "" "" "PROP_xilxPostTrceEndpointPath" "" "A" "" "" "" "PROP_xilxPostTrceRpt" "Error Report" "A" "" "" "" "PROP_xilxPostTrceRptLimit" "3" "A" "" "" "" "PROP_xilxPostTrceStamp" "" "A" "" "" "" "PROP_xilxPostTrceTSIFile" "" "A" "" "" "" "PROP_xilxPostTrceUncovPath" "" "A" "" "" "" "PROP_xilxPreTrceAdvAna" "false" "A" "" "" "" "PROP_xilxPreTrceEndpointPath" "" "A" "" "" "" "PROP_xilxPreTrceRpt" "Error Report" "A" "" "" "" "PROP_xilxPreTrceRptLimit" "3" "A" "" "" "" "PROP_xilxPreTrceUncovPath" "" "A" "" "" "" "PROP_xilxSynthAddIObuf" "true" "A" "" "" "" "PROP_xilxSynthGlobOpt" "AllClockNets" "A" "" "" "" "PROP_xilxSynthKeepHierarchy" "No" "A" "" "" "" "PROP_xilxSynthRegBalancing" "No" "A" "" "" "" "PROP_xilxSynthRegDuplication" "true" "A" "" "" "" "PROP_xilxTriStateBuffTXMode" "Off" "A" "" "" "" "PROP_xstAsynToSync" "false" "A" "" "" "" "PROP_xstAutoBRAMPacking" "false" "A" "" "" "" "PROP_xstBRAMUtilRatio" "100" "A" "" "" "" "PROP_xstBusDelimiter" "<>"
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