📄 ila_dd256_dw16_tw8_e2_xst_example.vhd
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-------------------------------------------------------------------------------
-- Copyright (c) 1999-2000 Xilinx Inc. All rights reserved.
-------------------------------------------------------------------------------
-- Title : ILA Core Xilinx XST Usage Example
-- Project : ChipScope
-------------------------------------------------------------------------------
-- File : ila_dd256_dw16_tw8_e2_xst_example.vhd
-- Company : Xilinx Inc.
-- Created : 2000/10/18
-- Last update: 2000/11/01
-- Version : 1.0
-------------------------------------------------------------------------------
-- Description: Example of how to instantiate the ILA core in a VHDL design
-- for use with the Xilinx XST synthesis tool.
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
entity ila_dd256_dw16_tw8_e2_xst_example is
end ila_dd256_dw16_tw8_e2_xst_example;
architecture structure of ila_dd256_dw16_tw8_e2_xst_example is
-------------------------------------------------------------------
--
-- ILA core component declaration
--
-------------------------------------------------------------------
component ila_dd256_dw16_tw8_e2
port
(
CONTROL : in std_logic_vector(41 downto 0);
CLK : in std_logic;
DATA : in std_logic_vector(15 downto 0);
TRIG : in std_logic_vector(7 downto 0)
);
end component;
-------------------------------------------------------------------
--
-- ILA core signal declarations
--
-------------------------------------------------------------------
signal control_bus : std_logic_vector(41 downto 0);
signal clk : std_logic;
signal data : std_logic_vector(15 downto 0);
signal trig : std_logic_vector(7 downto 0);
-------------------------------------------------------------------
--
-- ILA core compiler-specific attributes
--
-------------------------------------------------------------------
begin
-------------------------------------------------------------------
--
-- ILA core instance
--
-------------------------------------------------------------------
i_ila_dd256_dw16_tw8_e2 : ila_dd256_dw16_tw8_e2
port map
(
CONTROL => control_bus,
CLK => clk,
DATA => data,
TRIG => trig
);
end structure;
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