dcfifo_35l1.tdf

sdram读写

--dcfifo_mixed_widths ADD_RAM_OUTPUT_REGISTER="OFF" CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 CLOCKS_ARE_SYNCHRONIZED="FALSE" DEVICE_FAMILY="Cyclone" IGNORE_CARRY_BUFFERS="OFF" LPM_NUMWORDS=512 LPM_SHOWAHEAD="OFF" LPM_WIDTH=16 LPM_WIDTH_R=16 LPM_WIDTHU=9 LPM_WIDTHU_R=9 OVERFLOW_CHECKING="ON" RAM_BLOCK_TYPE="M4K" UNDERFLOW_CHECKING="ON" USE_EAB="ON" data q rdclk rdreq wrclk wrreq wrusedw CYCLONEII_M4K_COMPATIBILITY="ON" INTENDED_DEVICE_FAMILY="Cyclone" LOW_POWER_MODE="AUTO" lpm_hint="RAM_BLOCK_TYPE=M4K" ALTERA_INTERNAL_OPTIONS=AUTO_SHIFT_REGISTER_RECOGNITION=OFF
--VERSION_BEGIN 8.1 cbx_a_gray2bin 2008:05:19:09:32:04:SJ cbx_a_graycounter 2008:05:19:09:39:53:SJ cbx_altdpram 2008:05:19:10:27:12:SJ cbx_altsyncram 2008:08:26:11:57:11:SJ cbx_cycloneii 2008:05:19:10:57:37:SJ cbx_dcfifo 2008:09:07:22:36:06:SJ cbx_fifo_common 2008:05:19:10:54:06:SJ cbx_flex10ke 2008:05:19:10:53:03:SJ cbx_lpm_add_sub 2008:05:19:10:49:01:SJ cbx_lpm_compare 2008:09:01:07:44:05:SJ cbx_lpm_counter 2008:05:19:10:42:20:SJ cbx_lpm_decode 2008:05:19:10:39:27:SJ cbx_lpm_mux 2008:05:19:10:30:36:SJ cbx_mgl 2008:08:08:15:16:18:SJ cbx_scfifo 2008:05:19:10:25:30:SJ cbx_stratix 2008:08:05:17:10:23:SJ cbx_stratixii 2008:08:07:13:54:47:SJ cbx_stratixiii 2008:07:11:13:32:02:SJ cbx_util_mgl 2008:07:18:09:58:54:SJ  VERSION_END


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FUNCTION a_fefifo_ctc (aclr, clock, rreq, usedw_in[8..0])
RETURNS ( empty, full);
FUNCTION a_fefifo_htc (aclr, clock, usedw_in[8..0], wreq)
RETURNS ( empty, full);
FUNCTION a_gray2bin_q4b (gray[8..0])
RETURNS ( bin[8..0]);
FUNCTION a_graycounter_u06 (aclr, clock, cnt_en)
RETURNS ( q[8..0]);
FUNCTION dpram_6o31 (data[15..0], inclock, outclock, outclocken, rdaddress[8..0], wraddress[8..0], wren)
RETURNS ( q[15..0]);
FUNCTION dffpipe_gd9 (clock, clrn, d[8..0])
RETURNS ( q[8..0]);
FUNCTION alt_synch_pipe_oc8 (clock, clrn, d[8..0])
RETURNS ( q[8..0]);
FUNCTION alt_synch_pipe_pc8 (clock, clrn, d[8..0])
RETURNS ( q[8..0]);
FUNCTION add_sub_gub (dataa[8..0], datab[8..0])
RETURNS ( result[8..0]);
FUNCTION cntr_cta (aclr, clock, cnt_en)
RETURNS ( q[8..0]);

--synthesis_resources = lut 210 M4K 2 
OPTIONS ALTERA_INTERNAL_OPTION = "AUTO_SHIFT_REGISTER_RECOGNITION=OFF;suppress_da_rule_internal=d101;suppress_da_rule_internal=d102;-name CUT ON -from write_delay_cycle -to dffpipe_rs_dgwp|dffpipe10|dffe11a;-name SDC_STATEMENT ""set_false_path -from *write_delay_cycle* -to *dffpipe_rs_dgwp|dffpipe_id9:dffpipe10|dffe11a* "";-name CUT ON -from rdptr_g|power_modified_counter_values -to dffpipe_ws_dgrp|dffpipe14|dffe15a;-name SDC_STATEMENT ""set_false_path -from *rdptr_g|power_modified_counter_values* -to *dffpipe_ws_dgrp|dffpipe_jd9:dffpipe14|dffe15a* """;

SUBDESIGN dcfifo_35l1
( 
	data[15..0]	:	input;
	q[15..0]	:	output;
	rdclk	:	input;
	rdempty	:	output;
	rdfull	:	output;
	rdreq	:	input;
	rdusedw[8..0]	:	output;
	wrclk	:	input;
	wrempty	:	output;
	wrfull	:	output;
	wrreq	:	input;
	wrusedw[8..0]	:	output;
) 
VARIABLE 
	read_state : a_fefifo_ctc;
	write_state : a_fefifo_htc;
	gray2bin_rs_nbwp : a_gray2bin_q4b;
	gray2bin_ws_nbrp : a_gray2bin_q4b;
	rdptr_g : a_graycounter_u06;
	wrptr_g : a_graycounter_u06;
	fiforam : dpram_6o31;
	write_delay_cycle[8..0] : dffe;
	dffpipe_rdbuw : dffpipe_gd9;
	dffpipe_rdusedw : dffpipe_gd9;
	dffpipe_rs_dbwp : dffpipe_gd9;
	dffpipe_rs_dgwp : alt_synch_pipe_oc8;
	dffpipe_wr_dbuw : dffpipe_gd9;
	dffpipe_wrusedw : dffpipe_gd9;
	dffpipe_ws_dgrp : alt_synch_pipe_pc8;
	dffpipe_ws_nbrp : dffpipe_gd9;
	lpm_add_sub_rd_udwn : add_sub_gub;
	lpm_add_sub_wr_udwn : add_sub_gub;
	rdptr_b : cntr_cta;
	wrptr_b : cntr_cta;
	aclr	: NODE;
	rd_dbuw[8..0]	: WIRE;
	rd_udwn[8..0]	: WIRE;
	rs_dbwp[8..0]	: WIRE;
	rs_dgwp[8..0]	: WIRE;
	rs_nbwp[8..0]	: WIRE;
	tmp_aclr	: WIRE;
	tmp_data[8..0]	: WIRE;
	valid_rreq	: WIRE;
	valid_wreq	: WIRE;
	wr_dbuw[8..0]	: WIRE;
	wr_udwn[8..0]	: WIRE;
	ws_dbrp[8..0]	: WIRE;
	ws_dgrp[8..0]	: WIRE;
	ws_nbrp[8..0]	: WIRE;

BEGIN 
	read_state.aclr = aclr;
	read_state.clock = rdclk;
	read_state.rreq = rdreq;
	read_state.usedw_in[] = rd_dbuw[];
	write_state.aclr = aclr;
	write_state.clock = wrclk;
	write_state.usedw_in[] = wr_dbuw[];
	write_state.wreq = wrreq;
	gray2bin_rs_nbwp.gray[] = rs_dgwp[];
	gray2bin_ws_nbrp.gray[] = ws_dgrp[];
	rdptr_g.aclr = aclr;
	rdptr_g.clock = rdclk;
	rdptr_g.cnt_en = valid_rreq;
	wrptr_g.aclr = aclr;
	wrptr_g.clock = wrclk;
	wrptr_g.cnt_en = valid_wreq;
	fiforam.data[] = data[];
	fiforam.inclock = wrclk;
	fiforam.outclock = rdclk;
	fiforam.outclocken = valid_rreq;
	fiforam.rdaddress[] = rdptr_g.q[];
	fiforam.wraddress[] = wrptr_g.q[];
	fiforam.wren = valid_wreq;
	write_delay_cycle[].clk = wrclk;
	write_delay_cycle[].clrn = (! aclr);
	write_delay_cycle[].d = wrptr_g.q[];
	dffpipe_rdbuw.clock = rdclk;
	dffpipe_rdbuw.clrn = tmp_aclr;
	dffpipe_rdbuw.d[] = rd_udwn[];
	dffpipe_rdusedw.clock = rdclk;
	dffpipe_rdusedw.clrn = tmp_aclr;
	dffpipe_rdusedw.d[] = rd_udwn[];
	dffpipe_rs_dbwp.clock = rdclk;
	dffpipe_rs_dbwp.clrn = tmp_aclr;
	dffpipe_rs_dbwp.d[] = rs_nbwp[];
	dffpipe_rs_dgwp.clock = rdclk;
	dffpipe_rs_dgwp.clrn = tmp_aclr;
	dffpipe_rs_dgwp.d[] = write_delay_cycle[].q;
	dffpipe_wr_dbuw.clock = wrclk;
	dffpipe_wr_dbuw.clrn = tmp_aclr;
	dffpipe_wr_dbuw.d[] = wr_udwn[];
	dffpipe_wrusedw.clock = wrclk;
	dffpipe_wrusedw.clrn = tmp_aclr;
	dffpipe_wrusedw.d[] = wr_udwn[];
	dffpipe_ws_dgrp.clock = wrclk;
	dffpipe_ws_dgrp.clrn = tmp_aclr;
	dffpipe_ws_dgrp.d[] = tmp_data[];
	dffpipe_ws_nbrp.clock = wrclk;
	dffpipe_ws_nbrp.clrn = tmp_aclr;
	dffpipe_ws_nbrp.d[] = ws_nbrp[];
	lpm_add_sub_rd_udwn.dataa[] = rs_dbwp[];
	lpm_add_sub_rd_udwn.datab[] = rdptr_b.q[];
	lpm_add_sub_wr_udwn.dataa[] = wrptr_b.q[];
	lpm_add_sub_wr_udwn.datab[] = ws_dbrp[];
	rdptr_b.aclr = aclr;
	rdptr_b.clock = rdclk;
	rdptr_b.cnt_en = valid_rreq;
	wrptr_b.aclr = aclr;
	wrptr_b.clock = wrclk;
	wrptr_b.cnt_en = valid_wreq;
	aclr = GND;
	q[] = fiforam.q[];
	rd_dbuw[] = dffpipe_rdbuw.q[];
	rd_udwn[] = lpm_add_sub_rd_udwn.result[];
	rdempty = read_state.empty;
	rdfull = read_state.full;
	rdusedw[] = dffpipe_rdusedw.q[];
	rs_dbwp[] = dffpipe_rs_dbwp.q[];
	rs_dgwp[] = dffpipe_rs_dgwp.q[];
	rs_nbwp[] = gray2bin_rs_nbwp.bin[];
	tmp_aclr = (! aclr);
	tmp_data[] = rdptr_g.q[];
	valid_rreq = (rdreq & (! read_state.empty));
	valid_wreq = (wrreq & (! write_state.full));
	wr_dbuw[] = dffpipe_wr_dbuw.q[];
	wr_udwn[] = lpm_add_sub_wr_udwn.result[];
	wrempty = write_state.empty;
	wrfull = write_state.full;
	wrusedw[] = dffpipe_wrusedw.q[];
	ws_dbrp[] = dffpipe_ws_nbrp.q[];
	ws_dgrp[] = dffpipe_ws_dgrp.q[];
	ws_nbrp[] = gray2bin_ws_nbrp.bin[];
END;
--VALID FILE