dpram_6o31.tdf

sdram读写

--altdpram DEVICE_FAMILY="Cyclone" INTENDED_DEVICE_FAMILY="Cyclone" lpm_hint="RAM_BLOCK_TYPE=M4K" OUTDATA_REG="UNREGISTERED" RAM_BLOCK_TYPE="M4K" RDCONTROL_ACLR="OFF" RDCONTROL_REG="UNREGISTERED" SUPPRESS_MEMORY_CONVERSION_WARNINGS="ON" USE_EAB="ON" WIDTH=16 WIDTHAD=9 data inclock outclock outclocken q rdaddress wraddress wren CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO"
--VERSION_BEGIN 9.1 cbx_altdpram 2009:10:21:21:22:16:SJ cbx_altsyncram 2009:10:21:21:22:16:SJ cbx_cycloneii 2009:10:21:21:22:16:SJ cbx_lpm_add_sub 2009:10:21:21:22:16:SJ cbx_lpm_compare 2009:10:21:21:22:16:SJ cbx_lpm_decode 2009:10:21:21:22:16:SJ cbx_lpm_mux 2009:10:21:21:22:16:SJ cbx_mgl 2009:10:21:21:37:49:SJ cbx_stratix 2009:10:21:21:22:16:SJ cbx_stratixii 2009:10:21:21:22:16:SJ cbx_stratixiii 2009:10:21:21:22:16:SJ cbx_util_mgl 2009:10:21:21:22:16:SJ  VERSION_END


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--  functions, and any output files from any of the foregoing 
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--  without limitation, that your use is for the sole purpose of 
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FUNCTION altsyncram_1lh1 (address_a[8..0], address_b[8..0], clock0, clock1, clocken1, data_a[15..0], wren_a)
RETURNS ( q_b[15..0]);

--synthesis_resources = M4K 2 
SUBDESIGN dpram_6o31
( 
	data[15..0]	:	input;
	inclock	:	input;
	outclock	:	input;
	outclocken	:	input;
	q[15..0]	:	output;
	rdaddress[8..0]	:	input;
	wraddress[8..0]	:	input;
	wren	:	input;
) 
VARIABLE 
	altsyncram14 : altsyncram_1lh1;

BEGIN 
	altsyncram14.address_a[] = wraddress[];
	altsyncram14.address_b[] = rdaddress[];
	altsyncram14.clock0 = inclock;
	altsyncram14.clock1 = outclock;
	altsyncram14.clocken1 = outclocken;
	altsyncram14.data_a[] = data[];
	altsyncram14.wren_a = wren;
	q[] = altsyncram14.q_b[];
END;
--VALID FILE