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📄 prev_cmp_sdr_test.fit.qmsg

📁 sdram读写
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.1 Build 222 10/21/2009 SJ Full Version " "Info: Version 9.1 Build 222 10/21/2009 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sat Nov 13 15:57:20 2010 " "Info: Processing started: Sat Nov 13 15:57:20 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off sdr_test -c sdr_test " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off sdr_test -c sdr_test" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Info: Parallel compilation is enabled and will use 2 of the 2 processors detected" {  } {  } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
{ "Info" "IMPP_MPP_USER_DEVICE" "sdr_test EP2C5Q208C8 " "Info: Selected device EP2C5Q208C8 for design \"sdr_test\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_PLL_COMPUTATION_SUCCESS" "sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|pll Cyclone II PLL " "Info: Implemented PLL \"sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|pll\" as Cyclone II PLL type" { { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|_clk0 1 1 0 0 " "Info: Implementing clock multiplication of 1, clock division of 1, and phase shift of 0 degrees (0 ps) for sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|_clk0 port" {  } { { "altpll.tdf" "" { Text "d:/qii9.1/altera/quartus/libraries/megafunctions/altpll.tdf" 907 3 0 } }  } 0 0 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "" 0 -1} { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|_clk1 4 1 0 0 " "Info: Implementing clock multiplication of 4, clock division of 1, and phase shift of 0 degrees (0 ps) for sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|_clk1 port" {  } { { "altpll.tdf" "" { Text "d:/qii9.1/altera/quartus/libraries/megafunctions/altpll.tdf" 904 3 0 } }  } 0 0 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "" 0 -1} { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|_extclk0 4 1 0 0 " "Info: Implementing clock multiplication of 4, clock division of 1, and phase shift of 0 degrees (0 ps) for sys_ctrl:uut_sysctrl\|PLL_ctrl:uut_PLL_ctrl\|altpll:altpll_component\|_extclk0 port" {  } { { "altpll.tdf" "" { Text "d:/qii9.1/altera/quartus/libraries/megafunctions/altpll.tdf" 919 3 0 } }  } 0 0 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "" 0 -1}  } { { "altpll.tdf" "" { Text "d:/qii9.1/altera/quartus/libraries/megafunctions/altpll.tdf" 594 3 0 } }  } 0 0 "Implemented %3!s! \"%1!s!\" as %2!s! PLL type" 0 0 "" 0 -1}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 -1}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C5Q208I8 " "Info: Device EP2C5Q208I8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C8Q208C8 " "Info: Device EP2C8Q208C8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C8Q208I8 " "Info: Device EP2C8Q208I8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 -1}

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