pll_ctrl_inst.v

来自「sdram读写」· Verilog 代码 · 共 9 行

PLL_ctrl	PLL_ctrl_inst (
	.areset ( areset_sig ),
	.inclk0 ( inclk0_sig ),
	.c0 ( c0_sig ),
	.c1 ( c1_sig ),
	.e0 ( e0_sig ),
	.locked ( locked_sig )
	);