sdrsd50_071010.v

sdram读写

					CKE_FLAG = `FALSE;
				    pcke <= repeat (1) @(negedge pclk)  cke; 
				end
				else
				begin
					`ifdef M16G2_M641G
					  $display("Warning: tPDE violation at %t", CUR_TIME);
					`else
					  $display("Warning: tSS Precharge Power Down Exit Setup Violation at %t",CUR_TIME);
					`endif
					disable main;
				end
			end
		end

		if( POWERDOWN_MODE == `FALSE)
		begin
			if( CUR_TIME - TCKE < `tSS-`MARGIN )	// check cke setup timing
				$display("Warning: CKE setup violation at %t", CUR_TIME);
			else if( cke && SUSPEND_MODE == `TRUE )
			begin
`ifdef v			$display(">> clock suspension exit at 	%t", CUR_TIME);
`endif
				SUSPEND_MODE = `FALSE;
				pcke <= @(negedge clk) cke;
			end
			else
				pcke <= @(negedge clk) cke;
		end

// clock timing check

			TCC_P = CUR_TIME - TCLK_H;  // saving current clock period

			if( CUR_TIME - TCLK_H < `tCCmin-`MARGIN && POWERDOWN_MODE1 == `FALSE)//KyW ... 0928 for NOKIA claim
				$display("Warning: tCCmin violation at %t", CUR_TIME);

			if( CUR_TIME - TCLK_H > `tCCmax+`MARGIN && POWERDOWN_MODE1 == `FALSE)//KyW ... 0928 for NOKIA claim
				$display("Warning: tCCmax violation at %t", CUR_TIME);
`protect
			if( CUR_TIME - TCLK_L < `tCL-`MARGIN )
				$display("Warning: tCL violation at %t", CUR_TIME);

// pcke is high
		if( pcke ) begin

// csb timing check
			if( CUR_TIME - TCSB < `tSS-`MARGIN )
				$display("Warning: CSB setup violation at %t", CUR_TIME);
			else  //  if( CUR_TIME - TCSB < `tCCmin + `tSS-`MARGIN )
				CSB_FLAG = csb;

// if chip selected
			if( CSB_FLAG == `LOW )
			begin
				if( CUR_TIME - TRASB < `tSS-`MARGIN )
					$display("Warning: RASB setup violation at %t", CUR_TIME);
				else 
					RASB_FLAG = rasb;

				if( CUR_TIME - TCASB < `tSS-`MARGIN )
					$display("Warning: CASB setup violation at %t", CUR_TIME);
				else 
					CASB_FLAG = casb;
					
				if( CUR_TIME - TWEB < `tSS-`MARGIN )
					$display("Warning: WEB setup violation at %t", CUR_TIME);
				else 
					WEB_FLAG = web;

			end
			for (i = 0; i < `nDQM; i = i + 1) begin
			  if( CUR_TIME - $bitstoreal(TDQM[i]) < `tSS-`MARGIN )
				$display("Warning: DQM(%d) setup violation at %t", i, CUR_TIME);
			  else begin
//				dqm_r[i] <=  @(posedge pclk) dqm[i];
//  VCS does not support above statement. However Verilog-XL is OK. 
//  So, I modified as following statement for VCS.
				dqm_r[i] <= dqm_ri[i];
				dqm_ri[i] <= dqm[i];
			  end
			end
		end

		TCLK_H = CUR_TIME; // the time clock is high

	end

/*------------------------------------------
 *       command recognition
 *------------------------------------------
 */

always @( posedge pclk )
	if( PWR == `TRUE )
	begin : command
		integer bank_id;
		reg		[8*8:1] str;

		if( CSB_FLAG == `LOW )
		begin : command_sel
			if( auto_cnt == -1 )
			begin
				if( ~ `NOP ) // NOP1 -> NOP because of burst stop
					$display("Warning: NOP required during power-up pause time.");
				disable command_sel;
			end

			if( CUR_TIME - TADDR < `tSS-`MARGIN )
				$display("Warning: Address setup violation at %t", CUR_TIME);

			if( `NOP ) 	// deleted by burst stop -> NOP1 -> NOP
				disable command_sel;

			if( AUTOREF_MODE == `TRUE || SELFREF_MODE == `TRUE )
			begin
				$display("Warning: Illegal command in refresh operation at %t", CUR_TIME);
				disable command_sel;
			end
`ifdef DPD
			if (D_POWERDOWN == `TRUE) begin
				$display("Warning: Illegal command in deep power down exit at %t", CUR_TIME);
				disable command_sel;
			end
			if (D_PDOWN_EXIT) begin
				if (PROC_DPDEXIT == 0) begin
					if ({RASB_FLAG,CASB_FLAG,WEB_FLAG} == 3'b010) begin
					`ifdef M64_M128_M256
						`ifdef NBANK2
						  prech_reg[1] = ba;
						  prech_reg[0] = addr[`ADDR_AP];
						`endif
						`ifdef NBANK4
						  prech_reg[2] = ba[1];
						  prech_reg[1] = ba[0];
						  prech_reg[0] = addr[`ADDR_AP];
						`endif
					`endif
						PROC_DPDEXIT = 1;
						->precharge;
					end
					else $display("Warning: all bank precharge required to complete deep power down mode exit.");
				end
				else if (PROC_DPDEXIT == 1 || PROC_DPDEXIT == 2) begin
					if ({cke,RASB_FLAG,CASB_FLAG,WEB_FLAG} == 4'b1001) begin
						PROC_DPDEXIT = PROC_DPDEXIT + 1;
						->autorefresh;
					end
					else $display("Warning: 2 or more auto refresh required to complete deep power down mode exit.");
				end
				else if (PROC_DPDEXIT == 3) begin
					if ({RASB_FLAG,CASB_FLAG,WEB_FLAG} == 3'b000) begin
						D_PDOWN_EXIT = `FALSE;
						PROC_DPDEXIT = 0;
						->modeset;
					end
					else if ({cke,RASB_FLAG,CASB_FLAG,WEB_FLAG} == 4'b1001) begin
						->autorefresh;
					end
					else $display("Warning: Mode register set required to complete deep power down mode exit.");
				end
		end
						
`endif
			if( ~pwrup_done )
				if( auto_cnt < 2 )	
				begin
					case ( {RASB_FLAG,CASB_FLAG,WEB_FLAG} )
						'b010 :
							begin
							  `ifdef M64_M128_M256
								`ifdef NBANK2
								  prech_reg[1] = ba;
								  prech_reg[0] = addr[`ADDR_AP];
								`endif
								`ifdef NBANK4
								  prech_reg[2] = ba[1];
								  prech_reg[1] = ba[0];
								  prech_reg[0] = addr[`ADDR_AP];
								`endif
							  `endif
							  `ifdef M16
								prech_reg = addr[11:10];
							  `endif
								->precharge;
							end
						'b001 :
							if( cke )
								begin
									auto_cnt = auto_cnt + 1; 
									->autorefresh;
								end
						'b000 :
							begin
                    			if( MRS_SET == `TRUE )
                        			->modeset;
                    			else if( INIT == `TRUE )
                    			begin
                        			->modeset;
                        			INIT = `FALSE;
                    			end
                    			else
                        			$display("Warning: MODE register set need 2 clock cycles at %t", CUR_TIME);
                			end
							
						default: begin
							$display("Warning: 2 or more auto-refresh required during power up sequence.");  
						end
					endcase
					disable command_sel;
				end
				else 
					pwrup_done = `TRUE;

			case( {RASB_FLAG,CASB_FLAG,WEB_FLAG} )
			'b000 :
				begin
					if( MRS_SET == `TRUE )
						->modeset;
					else if( INIT == `TRUE )
					begin
						->modeset;
						INIT = `FALSE;
					end
					else
						$display("Warning: MODE register set need 2 clock cycles at %t", CUR_TIME);
				end
			'b011 :		// acitve
				begin
					if( MRS_SET == `TRUE )
					begin
						bank_id = BankSelect(ba);
						str = PrintBank(ba);
						if(Mode[bank_id] == `TRUE)
							$display("Warning: Illegal active (%0s is not precharged) at %t",str,CUR_TIME);

						else
							->active;
					end

					else if( INIT == `FALSE )
						$display("Warning: MODE register set need 2 clock cycles at %t",CUR_TIME);
					else if( INIT == `TRUE )
						$display("Warning: Initial MODE register set must be required before active at %t",CUR_TIME);
				end
`endprotect
			'b101 :
				begin	// read command
					bank_id = BankSelect(ba);
					str = PrintBank(ba);
                    gapless = (pclk_high == last_rw && auto_flag[bank_id]) ? 
								`TRUE : `FALSE;
					`ifdef M16G4_M64G3
					  if (precharge_flag[bank_id])
					    begin
						  $display("Warning: Illegal command in precharge operation at %t",CUR_TIME);
						  disable command_sel;
					    end
					`else
					  if( auto_flagx )
					    begin
						  $display("Warning: Illegal command in auto-precharge command at %t",CUR_TIME);
						  disable command_sel;
					    end
					`endif
					else if( Mode[bank_id] == `TRUE)
					begin
						if( READ_MODE == `TRUE)
						begin
`ifdef M64G3_M128_M256
							if (auto_flag[prev_ba] == `TRUE && prev_ba != bank_id) begin
								rd_autoprech_reg = prev_ba;
								->rd_autoprecharge;
							end
`endif
							READ_MODE = `FALSE;
							#0 disable read_block;
						end
						if( WRITE_MODE == `TRUE)
						begin
`ifdef M64G3_M128_M256
							if (auto_flag[prev_ba] == `TRUE && prev_ba != bank_id) begin
//`ifdef RDL2
								if (`tRDL == 2) begin
									wr_autoprech_reg2 = prev_ba;
									->wr_autoprecharge2;
								end
//`else
								else begin
									wr_autoprech_reg = prev_ba;
									->wr_autoprecharge;
								end
//`endif
							end
`endif
							WRITE_MODE = `FALSE;
							disable write_block;
						end
                        last_read = CUR_TIME;
                        prev_com = {RASB_FLAG,CASB_FLAG,WEB_FLAG};
			prev_ba = ba;
                        rw_dqm <= `FALSE;
						#0 ->read;
					end

					else
						$display("Warning: Illegal read (%0s is not acitve) at %t",str,CUR_TIME);
				end
			'b100 :
				begin	// write command
					bank_id = BankSelect(ba);
					str = PrintBank(ba);
                      if (prev_com == 3'b101) begin
                        if (clkh_dq !== `B'bz && data_read_delay == 1'b1) // 98.6.29 BYC
                            $display("Warning: HIZ should be issued 1 cycle before write op at %t", CUR_TIME);

			if (CUR_TIME - TCAS_P < (CL+2)*TCC_P || READ_MODE == `FALSE)   data_read <= repeat(1) @(posedge pclk) 1'b0;	// AHJ

                      end
					`ifdef M16G2_M641G
					`else
                      gapless = (pclk_high == last_rw && auto_flag[bank_id]) 
								? `TRUE : `FALSE;
					`endif
					`ifdef M16G4_M64G3
					  if (precharge_flag[bank_id])
					    begin
						  $display("Warning: Illegal command in precharge operation at %t",CUR_TIME);
						  disable command_sel;
					    end
					`else
					  if( auto_flagx )
					    begin
						  $display("Warning: Illegal command in auto-precharge command at %t",CUR_TIME);
						  disable command_sel;
					    end
					`endif
`protect
					else if( Mode[bank_id] == `TRUE)
					begin
						if( READ_MODE == `TRUE )
						begin
`ifdef M64G3_M128_M256
							if (auto_flag[prev_ba] == `TRUE && prev_ba != bank_id) begin
								rd_autoprech_reg = prev_ba;
								->rd_autoprecharge;
							end
`endif
							READ_MODE = `FALSE;
							tdata_read <= @(posedge pclk) READ_MODE;	// 3.2
							#0 disable read_block;
						end
						if( WRITE_MODE == `TRUE )
						begin
`ifdef M64G3_M128_M256
							if (auto_flag[prev_ba] == `TRUE && prev_ba != bank_id) begin
//`ifdef RDL2
								if (`tRDL == 2) begin
									wr_autoprech_reg2 = prev_ba;
									->wr_autoprecharge2;
								end
//`else
								else begin
									wr_autoprech_reg = prev_ba;
									->wr_autoprecharge;
								end
//`endif
							end
`endif
							WRITE_MODE = `FALSE;
							disable write_block;
						end
					        if( |dqm === 1'b0 ) begin // 98.6.26 BYC
						if( CUR_TIME - TDQI < `tSS-`MARGIN )
							$display("Warning: DQi setup violation at %t", CUR_TIME);
						end
                        prev_com = {RASB_FLAG,CASB_FLAG,WEB_FLAG};
			prev_ba = ba;
                        if (pclk_high == last_read)
                        rw_dqm <= @(negedge pclk) `TRUE;
						//#0 ->write;
						write_event <= `TRUE; //KyW ... 0408 for VCS
						write_event <= #0.1 `FALSE; //KyW ... 0408 for VCS
					end
					else 
						$display("Warning: Illegal write ( %0s is not active) at %t",str,CUR_TIME);
				
				end
			'b110 :  // burst stop
`ifdef DPD
				if( cke === 1'b0 )
					->deeppowerdown;
				else if (cke === 1'b1)
`endif
				begin
`ifdef v				$display ("Burst stop");
`endif


                    if( READ_MODE == `TRUE )
                    begin
                        READ_MODE = `FALSE;
`ifdef v                $display("-- reading burst stop at %t", CUR_TIME);
`endif
                        disable read_block;
                    end  
                    else if( WRITE_MODE == `TRUE)
                    begin
                         // at this clock, writing done
`ifdef v                 $display("-- writing burst stop at %t", CUR_TIME);
`endif
						`ifdef M16G2_M641G
                          WRITE_MODE =  @(negedge pclk) `FALSE;
						`else
                          WRITE_MODE =  `FALSE;
						`endif
                        disable write_block;
                    end  
                    prev_com = {RASB_FLAG,CASB_FLAG,WEB_FLAG};
                end
			'b010 :
				begin
`endprotect
				`ifdef M16G4_M64G3 //KyW ... 0624 : rev 3.3
				`else
					if(auto_flagx == `TRUE && (addr[`ADDR_AP] || ba == c_bank_addr))
					begin
						$display("Warning: Illegal command in auto-precharge command at %t",CUR_TIME);
						disable command_sel;
					end
				`endif
					`ifdef M64_M128_M256
					  `ifdef NBANK2
					    prech_reg[1] = ba;
					    prech_reg[0] = addr[`ADDR_AP];
					  `endif
					  `ifdef NBANK4
					    prech_reg[2] = ba[1];
					    prech_reg[1] = ba[0];
					    prech_reg[0] = addr[`ADDR_AP];
					  `endif
					`endif
					`ifdef M16
					  prech_reg = addr[11:10];
					`endif
					->precharge;
				end
`protect
			'b001 : begin
				if( cke )
					->autorefresh;
				else if( ~cke )
					->selfrefresh;
			end
//			default :
`ifdef v  //			$display("- NOP");
`endif
			endcase
		end  // command_sel