sdr_test_modelsim.xrf

sdram读写

vendor_name = ModelSim
source_file = 1, F:/EP2C5/project/sdram_test/uart_tx.v
source_file = 1, F:/EP2C5/project/sdram_test/uart_speed_select.v
source_file = 1, F:/EP2C5/project/sdram_test/uart_ctrl.v
source_file = 1, F:/EP2C5/project/sdram_test/sdr_test.v
source_file = 1, F:/EP2C5/project/sdram_test/sdram_cmd.v
source_file = 1, F:/EP2C5/project/sdram_test/sdram_ctrl.v
source_file = 1, F:/EP2C5/project/sdram_test/sdram_top.v
source_file = 1, F:/EP2C5/project/sdram_test/sdram_wr_data.v
source_file = 1, F:/EP2C5/project/sdram_test/sys_ctrl.v
source_file = 1, F:/EP2C5/project/sdram_test/PLL_ctrl.qip
source_file = 1, F:/EP2C5/project/sdram_test/PLL_ctrl.v
source_file = 1, F:/EP2C5/project/sdram_test/wrfifo.qip
source_file = 1, F:/EP2C5/project/sdram_test/wrfifo.v
source_file = 1, F:/EP2C5/project/sdram_test/sdfifo_ctrl.v
source_file = 1, F:/EP2C5/project/sdram_test/rdfifo.qip
source_file = 1, F:/EP2C5/project/sdram_test/rdfifo.v
source_file = 1, F:/EP2C5/project/sdram_test/datagene.v
source_file = 1, F:/EP2C5/project/sdram_test/led_test.v
source_file = 1, F:/EP2C5/project/sdram_test/db/sdr_test.cbx.xml
source_file = 1, F:/EP2C5/project/sdram_test/sdr_para.v
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/altpll.tdf
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/aglobal91.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/stratix_pll.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/stratixii_pll.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/cycloneii_pll.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/cbx.lst
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/dcfifo.tdf
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/lpm_counter.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/lpm_add_sub.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/altdpram.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/a_graycounter.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/a_fefifo.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/a_gray2bin.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/dffpipe.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/alt_sync_fifo.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/lpm_compare.inc
source_file = 1, d:/qii9.1/altera/quartus/libraries/megafunctions/altsyncram_fifo.inc
source_file = 1, F:/EP2C5/project/sdram_test/db/dcfifo_aal1.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/a_gray2bin_kdb.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/a_graycounter_o96.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/a_graycounter_d2c.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/a_graycounter_c2c.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/altsyncram_3j01.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/altsyncram_e7e1.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/dffpipe_c2e.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/alt_synch_pipe_fv7.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/dffpipe_909.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/alt_synch_pipe_gv7.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/dffpipe_a09.tdf
source_file = 1, F:/EP2C5/project/sdram_test/db/cmpr_536.tdf
source_file = 1, F:/EP2C5/project/sdram_test/sdr_test.sdc
design_name = sdr_test
instance = comp, \uut_sdramtop|module_001|work_state_r.0100 , uut_sdramtop|module_001|work_state_r.0100, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|work_state_r.0011 , uut_sdramtop|module_001|work_state_r.0011, sdr_test, 1
instance = comp, \uut_sdramtop|module_002|WideOr0~0 , uut_sdramtop|module_002|WideOr0~0, sdr_test, 1
instance = comp, \uut_sdramtop|module_002|Selector15~0 , uut_sdramtop|module_002|Selector15~0, sdr_test, 1
instance = comp, \uut_sdramtop|module_002|Selector22~0 , uut_sdramtop|module_002|Selector22~0, sdr_test, 1
instance = comp, \uut_datagene|wr_addr[5] , uut_datagene|wr_addr[5], sdr_test, 1
instance = comp, \uut_sdramtop|module_002|Selector20~0 , uut_sdramtop|module_002|Selector20~0, sdr_test, 1
instance = comp, \uut_datagene|rd_addr[8] , uut_datagene|rd_addr[8], sdr_test, 1
instance = comp, \uut_sdramtop|module_002|Selector19~0 , uut_sdramtop|module_002|Selector19~0, sdr_test, 1
instance = comp, \uut_datagene|wr_addr[9] , uut_datagene|wr_addr[9], sdr_test, 1
instance = comp, \uut_uartctrl|uut_tx|Mux0~0 , uut_uartctrl|uut_tx|Mux0~0, sdr_test, 1
instance = comp, \uut_uartctrl|uut_tx|Mux0~1 , uut_uartctrl|uut_tx|Mux0~1, sdr_test, 1
instance = comp, \uut_led_test|cnt[3] , uut_led_test|cnt[3], sdr_test, 1
instance = comp, \uut_led_test|cnt[5] , uut_led_test|cnt[5], sdr_test, 1
instance = comp, \uut_led_test|Equal0~3 , uut_led_test|Equal0~3, sdr_test, 1
instance = comp, \uut_led_test|cnt[16] , uut_led_test|cnt[16], sdr_test, 1
instance = comp, \uut_led_test|cnt[18] , uut_led_test|cnt[18], sdr_test, 1
instance = comp, \uut_led_test|cnt[19] , uut_led_test|cnt[19], sdr_test, 1
instance = comp, \uut_led_test|Equal0~5 , uut_led_test|Equal0~5, sdr_test, 1
instance = comp, \uut_led_test|cnt[21] , uut_led_test|cnt[21], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[0] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[0], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[1] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[1], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rdempty_eq_comp|aneb_result_wire[0]~0 , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rdempty_eq_comp|aneb_result_wire[0]~0, sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[4] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[4], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[5] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rs_dgwp|dffpipe17|dffe18a[5], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rdempty_eq_comp|aneb_result_wire[0]~3 , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|rdempty_eq_comp|aneb_result_wire[0]~3, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|cnt_clk_r[5] , uut_sdramtop|module_001|cnt_clk_r[5], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|wrfull_eq_comp|aneb_result_wire[0]~0 , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|wrfull_eq_comp|aneb_result_wire[0]~0, sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|wrfull_eq_comp|aneb_result_wire[0]~3 , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|wrfull_eq_comp|aneb_result_wire[0]~3, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|cnt_200us[9] , uut_sdramtop|module_001|cnt_200us[9], sdr_test, 1
instance = comp, \uut_sdramtop|module_001|cnt_200us[2] , uut_sdramtop|module_001|cnt_200us[2], sdr_test, 1
instance = comp, \uut_sdramtop|module_001|Equal0~2 , uut_sdramtop|module_001|Equal0~2, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|cnt_200us[5] , uut_sdramtop|module_001|cnt_200us[5], sdr_test, 1
instance = comp, \uut_sdramtop|module_001|Selector11~1 , uut_sdramtop|module_001|Selector11~1, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|Selector13~0 , uut_sdramtop|module_001|Selector13~0, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|Selector13~1 , uut_sdramtop|module_001|Selector13~1, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|work_state_r~24 , uut_sdramtop|module_001|work_state_r~24, sdr_test, 1
instance = comp, \uut_sdramtop|module_001|Selector14~0 , uut_sdramtop|module_001|Selector14~0, sdr_test, 1
instance = comp, \uut_datagene|rd_addr[8]~27 , uut_datagene|rd_addr[8]~27, sdr_test, 1
instance = comp, \uut_datagene|wr_addr[5]~21 , uut_datagene|wr_addr[5]~21, sdr_test, 1
instance = comp, \uut_datagene|wr_addr[9]~29 , uut_datagene|wr_addr[9]~29, sdr_test, 1
instance = comp, \uut_datagene|cntwr[4] , uut_datagene|cntwr[4], sdr_test, 1
instance = comp, \uut_datagene|cntwr[6] , uut_datagene|cntwr[6], sdr_test, 1
instance = comp, \uut_datagene|always3~1 , uut_datagene|always3~1, sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_bwp|dffe18a[7] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_bwp|dffe18a[7], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_brp|dffe18a[6] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_brp|dffe18a[6], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_bwp|dffe18a[5] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_bwp|dffe18a[5], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_brp|dffe18a[4] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_brp|dffe18a[4], sdr_test, 1
instance = comp, \uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_brp|dffe18a[3] , uut_sdffifoctrl|uut_rdfifo|dcfifo_component|auto_generated|ws_brp|dffe18a[3], sdr_test, 1