key.eq1

VHDL实例,适合大家学习使用

ispDesignEXPERT 8.4

Design key created Wed Feb 27 10:40:07 2002


 P-Terms   Fan-in  Fan-out  Type  Name (attributes)
---------  ------  -------  ----  -----------------
   2/2        2        1    Pin   EN 
   3/3        3        1    Pin   SS1.REG 
   1/1        1        1    Pin   SS1.C 
   3/3        3        1    Pin   SS0.REG 
   1/1        1        1    Pin   SS0.C 
=========
  10/10         Best P-Term Total: 10
                       Total Pins: 5
                      Total Nodes: 0
            Average P-Term/Output: 2


Equations:

EN = (SS1.FB & !SS0.FB
     # !SS1.FB & SS0.FB);

SS1 := (!SS1.FB & SS0.FB & K
     # SS1.FB & !SS0.FB
     # SS1.FB & !K);

SS1.C = (CLK);

SS0 := (SS1.FB & !SS0.FB & K
     # SS0.FB & !K
     # !SS1.FB & !K);

SS0.C = (CLK);


Reverse-Polarity Equations:

!EN = (!SS1.FB & !SS0.FB
     # SS1.FB & SS0.FB);

!SS1 := (SS1.FB & SS0.FB & K
     # !SS1.FB & !SS0.FB
     # !SS1.FB & !K);

!SS1.C = (!CLK);

!SS0 := (SS1.FB & !SS0.FB & !K
     # SS0.FB & K
     # !SS1.FB & K);

!SS0.C = (!CLK);