📄 pb.laf
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NET GATE_N_9_N_2 SRC GATE_N_9_I_2.ZN0 DST GATE_N_9_I_3.A1 ;
NET GATE_N_10_N_1 SRC GATE_N_10_I_1.ZN0 DST GATE_N_10_I_3.A0 ;
NET GATE_N_10_N_2 SRC GATE_N_10_I_2.ZN0 DST GATE_N_10_I_3.A1 ;
NET GATE_N_11_N_1 SRC GATE_N_11_I_1.ZN0 DST GATE_N_11_I_3.A0 ;
NET GATE_N_11_N_2 SRC GATE_N_11_I_2.ZN0 DST GATE_N_11_I_3.A1 ;
NET GATE_N_12_N_1 SRC GATE_N_12_I_1.ZN0 DST GATE_N_12_I_3.A0 ;
NET GATE_N_12_N_2 SRC GATE_N_12_I_2.ZN0 DST GATE_N_12_I_3.A1 ;
NET GATE_SEG2_N_3 SRC GATE_SEG2_I_3.ZN0 DST GATE_SEG2_I_4.A2 ;
NET GATE_SEG2_N_2 SRC GATE_SEG2_U3.ZN0 DST GATE_SEG2_I_4.A1 ;
NET GATE_SEG2_N_1 SRC GATE_SEG2_I_2.ZN0 DST GATE_SEG2_I_4.A0 ;
NET GATE_SEG7_N_3 SRC GATE_SEG7_I_3.ZN0 DST GATE_SEG7_I_4.A2 ;
NET GATE_SEG7_N_2 SRC GATE_SEG7_U3.ZN0 DST GATE_SEG7_I_4.A1 ;
NET GATE_SEG7_N_1 SRC GATE_SEG7_I_2.ZN0 DST GATE_SEG7_I_4.A0 ;
NET GATE_SEG8_N_3 SRC GATE_SEG8_I_3.ZN0 DST GATE_SEG8_I_4.A2 ;
NET GATE_SEG8_N_2 SRC GATE_SEG8_U3.ZN0 DST GATE_SEG8_I_4.A1 ;
NET GATE_SEG8_N_1 SRC GATE_SEG8_I_2.ZN0 DST GATE_SEG8_I_4.A0 ;
NET GATE_N_13_D_REG_N_1 SRC GATE_N_13_D_REG_I_1.ZN0 DST GATE_N_13_D_REG_I_3.A0 ;
NET GATE_N_13_D_REG_N_2 SRC GATE_N_13_D_REG_I_2.ZN0 DST GATE_N_13_D_REG_I_3.A1 ;
NET GATE_N_15_D_REG_N_1 SRC GATE_N_15_D_REG_I_1.ZN0 DST GATE_N_15_D_REG_I_3.A0 ;
NET GATE_N_15_D_REG_N_2 SRC GATE_N_15_D_REG_I_2.ZN0 DST GATE_N_15_D_REG_I_3.A1 ;
NET GATE_N_17_D_REG_N_1 SRC GATE_N_17_D_REG_I_1.ZN0 DST GATE_N_17_D_REG_I_3.A0 ;
NET GATE_N_17_D_REG_N_2 SRC GATE_N_17_D_REG_I_2.ZN0 DST GATE_N_17_D_REG_I_3.A1 ;
NET GATE_N_19_D_REG_N_1 SRC GATE_N_19_D_REG_I_1.ZN0 DST GATE_N_19_D_REG_I_3.A0 ;
NET GATE_N_19_D_REG_N_2 SRC GATE_N_19_D_REG_I_2.ZN0 DST GATE_N_19_D_REG_I_3.A1 ;
NET GATE_N_21_D_REG_N_1 SRC GATE_N_21_D_REG_I_1.ZN0 DST GATE_N_21_D_REG_I_3.A0 ;
NET GATE_N_21_D_REG_N_2 SRC GATE_N_21_D_REG_I_2.ZN0 DST GATE_N_21_D_REG_I_3.A1 ;
NET GATE_N_22_D_REG_N_1 SRC GATE_N_22_D_REG_I_1.ZN0 DST GATE_N_22_D_REG_I_3.A0 ;
NET GATE_N_22_D_REG_N_2 SRC GATE_N_22_D_REG_I_2.ZN0 DST GATE_N_22_D_REG_I_3.A1 ;
NET GATE_N_24_D_REG_N_1 SRC GATE_N_24_D_REG_I_1.ZN0 DST GATE_N_24_D_REG_I_3.A0 ;
NET GATE_N_24_D_REG_N_2 SRC GATE_N_24_D_REG_I_2.ZN0 DST GATE_N_24_D_REG_I_3.A1 ;
NET GATE_N_26_D_REG_N_1 SRC GATE_N_26_D_REG_I_1.ZN0 DST GATE_N_26_D_REG_I_3.A0 ;
NET GATE_N_26_D_REG_N_2 SRC GATE_N_26_D_REG_I_2.ZN0 DST GATE_N_26_D_REG_I_3.A1 ;
NET GATE_N_28_D_REG_N_1 SRC GATE_N_28_D_REG_I_1.ZN0 DST GATE_N_28_D_REG_I_3.A0 ;
NET GATE_N_28_D_REG_N_2 SRC GATE_N_28_D_REG_I_2.ZN0 DST GATE_N_28_D_REG_I_3.A1 ;
NET GATE_N_29_D_REG_N_1 SRC GATE_N_29_D_REG_I_1.ZN0 DST GATE_N_29_D_REG_I_3.A0 ;
NET GATE_N_29_D_REG_N_2 SRC GATE_N_29_D_REG_I_2.ZN0 DST GATE_N_29_D_REG_I_3.A1 ;
NET GATE_N_31_D_REG_N_1 SRC GATE_N_31_D_REG_I_1.ZN0 DST GATE_N_31_D_REG_I_3.A0 ;
NET GATE_N_31_D_REG_N_2 SRC GATE_N_31_D_REG_I_2.ZN0 DST GATE_N_31_D_REG_I_3.A1 ;
NET GATE_N_33_D_REG_N_1 SRC GATE_N_33_D_REG_I_1.ZN0 DST GATE_N_33_D_REG_I_3.A0 ;
NET GATE_N_33_D_REG_N_2 SRC GATE_N_33_D_REG_I_2.ZN0 DST GATE_N_33_D_REG_I_3.A1 ;
NET GATE_I26_Q1_D_REG_N_1 SRC GATE_I26_Q1_D_REG_I_1.ZN0 DST GATE_I26_Q1_D_REG_I_3.A0 ;
NET GATE_I26_Q1_D_REG_N_2 SRC GATE_I26_Q1_D_REG_I_2.ZN0 DST GATE_I26_Q1_D_REG_I_3.A1 ;
NET GATE_I26_Q3_D_REG_N_1 SRC GATE_I26_Q3_D_REG_I_1.ZN0 DST GATE_I26_Q3_D_REG_I_3.A0 ;
NET GATE_I26_Q3_D_REG_N_2 SRC GATE_I26_Q3_D_REG_I_2.ZN0 DST GATE_I26_Q3_D_REG_I_3.A1 ;
NET GATE_I22_Q2_D_REG_N_1 SRC GATE_I22_Q2_D_REG_I_1.ZN0 DST GATE_I22_Q2_D_REG_I_3.A0 ;
NET GATE_I22_Q2_D_REG_N_2 SRC GATE_I22_Q2_D_REG_I_2.ZN0 DST GATE_I22_Q2_D_REG_I_3.A1 ;
NET GATE_I22_Q1_D_REG_N_1 SRC GATE_I22_Q1_D_REG_I_1.ZN0 DST GATE_I22_Q1_D_REG_I_3.A0 ;
NET GATE_I22_Q1_D_REG_N_2 SRC GATE_I22_Q1_D_REG_I_2.ZN0 DST GATE_I22_Q1_D_REG_I_3.A1 ;
NET GATE_T__0_N_1 SRC GATE_T__0_I_1.ZN0 DST GATE_T__0_I_3.A0 ;
NET GATE_T__0_N_2 SRC GATE_T__0_I_2.ZN0 DST GATE_T__0_I_3.A1 ;
NET GATE_T__2_N_1 SRC GATE_T__2_I_1.ZN0 DST GATE_T__2_I_3.A0 ;
NET GATE_T__2_N_2 SRC GATE_T__2_I_2.ZN0 DST GATE_T__2_I_3.A1 ;
NET GATE_T__3_N_1 SRC GATE_T__3_I_1.ZN0 DST GATE_T__3_I_3.A0 ;
NET GATE_T__3_N_2 SRC GATE_T__3_I_2.ZN0 DST GATE_T__3_I_3.A1 ;
NET GATE_T__6_N_1 SRC GATE_T__6_I_1.ZN0 DST GATE_T__6_I_3.A0 ;
NET GATE_T__7_N_1 SRC GATE_T__7_I_1.ZN0 DST GATE_T__7_I_3.A0 ;
NET GATE_T__7_N_2 SRC GATE_T__7_I_2.ZN0 DST GATE_T__7_I_3.A1 ;
NET GATE_T__8_N_1 SRC GATE_T__8_I_1.ZN0 DST GATE_T__8_I_3.A0 ;
NET GATE_T__9_N_1 SRC GATE_T__9_I_1.ZN0 DST GATE_T__9_I_3.A0 ;
NET GATE_T__9_N_2 SRC GATE_T__9_I_2.ZN0 DST GATE_T__9_I_3.A1 ;
NET GATE_T__10_N_1 SRC GATE_T__10_I_1.ZN0 DST GATE_T__10_I_3.A0 ;
NET GATE_T__10_N_2 SRC GATE_T__10_I_2.ZN0 DST GATE_T__10_I_3.A1 ;
NET GATE_T__11_N_1 SRC GATE_T__11_I_1.ZN0 DST GATE_T__11_I_3.A0 ;
NET GATE_T__11_N_2 SRC GATE_T__11_I_2.ZN0 DST GATE_T__11_I_3.A1 ;
NET GATE_T__12_N_1 SRC GATE_T__12_I_1.ZN0 DST GATE_T__12_I_3.A0 ;
NET GATE_T__12_N_2 SRC GATE_T__12_I_2.ZN0 DST GATE_T__12_I_3.A1 ;
NET GATE_T__13_N_1 SRC GATE_T__13_I_1.ZN0 DST GATE_T__13_I_3.A0 ;
NET GATE_T__13_N_2 SRC GATE_T__13_I_2.ZN0 DST GATE_T__13_I_3.A1 ;
NET GATE_T__14_N_1 SRC GATE_T__14_I_1.ZN0 DST GATE_T__14_I_3.A0 ;
NET GATE_T__14_N_2 SRC GATE_T__14_I_2.ZN0 DST GATE_T__14_I_3.A1 ;
NET GATE_T__15_N_1 SRC GATE_T__15_I_1.ZN0 DST GATE_T__15_I_3.A0 ;
NET GATE_T__15_N_2 SRC GATE_T__15_I_2.ZN0 DST GATE_T__15_I_3.A1 ;
NET GATE_T__16_N_1 SRC GATE_T__16_I_1.ZN0 DST GATE_T__16_I_3.A0 ;
NET GATE_T__16_N_2 SRC GATE_T__16_I_2.ZN0 DST GATE_T__16_I_3.A1 ;
NET GATE_T__17_N_1 SRC GATE_T__17_I_1.ZN0 DST GATE_T__17_I_3.A0 ;
NET GATE_T__17_N_2 SRC GATE_T__17_I_2.ZN0 DST GATE_T__17_I_3.A1 ;
NET GATE_T__18_N_1 SRC GATE_T__18_I_1.ZN0 DST GATE_T__18_I_3.A0 ;
NET GATE_T__18_N_2 SRC GATE_T__18_I_2.ZN0 DST GATE_T__18_I_3.A1 ;
NET GATE_T__19_N_1 SRC GATE_T__19_I_1.ZN0 DST GATE_T__19_I_3.A0 ;
NET GATE_T__19_N_2 SRC GATE_T__19_I_2.ZN0 DST GATE_T__19_I_3.A1 ;
NET GATE_T__20_N_1 SRC GATE_T__20_I_1.ZN0 DST GATE_T__20_I_3.A0 ;
NET GATE_T__20_N_2 SRC GATE_T__20_I_2.ZN0 DST GATE_T__20_I_3.A1 ;
NET GATE_T__21_N_1 SRC GATE_T__21_I_1.ZN0 DST GATE_T__21_I_3.A0 ;
NET GATE_T__21_N_2 SRC GATE_T__21_I_2.ZN0 DST GATE_T__21_I_3.A1 ;
NET GATE_T__22_N_1 SRC GATE_T__22_I_1.ZN0 DST GATE_T__22_I_3.A0 ;
NET GATE_T__22_N_2 SRC GATE_T__22_I_2.ZN0 DST GATE_T__22_I_3.A1 ;
NET GATE_T__23_N_1 SRC GATE_T__23_I_1.ZN0 DST GATE_T__23_I_3.A0 ;
NET GATE_T__23_N_2 SRC GATE_T__23_I_2.ZN0 DST GATE_T__23_I_3.A1 ;
NET GATE_T__24_N_2 SRC GATE_T__24_U3.ZN0 DST GATE_T__24_U1.A1 ;
NET GATE_T__24_N_1 SRC GATE_T__24_U2.ZN0 DST GATE_T__24_U1.A0 ;
NET GATE_T__27_N_1 SRC GATE_T__27_I_1.ZN0 DST GATE_T__27_I_3.A0 ;
NET GATE_T__28_N_2 SRC GATE_T__28_U3.ZN0 DST GATE_T__28_U1.A1 ;
NET GATE_T__28_N_1 SRC GATE_T__28_U2.ZN0 DST GATE_T__28_U1.A0 ;
NET GATE_T__31_N_1 SRC GATE_T__31_I_1.ZN0 DST GATE_T__31_I_3.A0 ;
NET GATE_T__34_N_2 SRC GATE_T__34_U3.ZN0 DST GATE_T__34_U1.A1 ;
NET GATE_T__34_N_1 SRC GATE_T__34_U2.ZN0 DST GATE_T__34_U1.A0 ;
NET GATE_T__37_N_1 SRC GATE_T__37_I_1.ZN0 DST GATE_T__37_I_3.A0 ;
NET GATE_T__40_N_2 SRC GATE_T__40_U3.ZN0 DST GATE_T__40_U1.A1 ;
NET GATE_T__40_N_1 SRC GATE_T__40_U2.ZN0 DST GATE_T__40_U1.A0 ;
NET GATE_T__43_N_1 SRC GATE_T__43_I_1.ZN0 DST GATE_T__43_I_3.A0 ;
NET GATE_T__44_N_1 SRC GATE_T__44_I_1.ZN0 DST GATE_T__44_I_3.A0 ;
NET GATE_T__46_N_2 SRC GATE_T__46_U3.ZN0 DST GATE_T__46_I_1.A1 ;
NET GATE_T__46_N_1 SRC GATE_T__46_I_2.ZN0 DST GATE_T__46_I_1.A0 ;
NET GATE_T__48_N_1 SRC GATE_T__48_I_1.ZN0 DST GATE_T__48_I_3.A0 ;
NET GATE_T__49_N_2 SRC GATE_T__49_U3.ZN0 DST GATE_T__49_I_4.A1 ;
NET GATE_T__49_N_1 SRC GATE_T__49_I_2.ZN0 DST GATE_T__49_I_4.A0 ;
NET GATE_T__50_N_1 SRC GATE_T__50_I_1.ZN0 DST GATE_T__50_U1.A0 ;
NET GATE_T__51_N_1 SRC GATE_T__51_I_2.ZN0 DST GATE_T__51_I_4.A0 ;
NET GATE_T__52_N_1 SRC GATE_T__52_I_1.ZN0 DST GATE_T__52_U1.A0 ;
NET GATE_T__55_N_1 SRC GATE_T__55_I_1.ZN0 DST GATE_T__55_U1.A0 ;
NET GATE_T__56_N_1 SRC GATE_T__56_I_1.ZN0 DST GATE_T__56_U1.A0 ;
NET GATE_T__57_N_1 SRC GATE_T__57_I_2.ZN0 DST GATE_T__57_I_4.A0 ;
NET GATE_T__58_N_1 SRC GATE_T__58_I_1.ZN0 DST GATE_T__58_U1.A0 ;
NET GATE_T__59_N_2 SRC GATE_T__59_U3.ZN0 DST GATE_T__59_I_4.A1 ;
NET GATE_T__59_N_1 SRC GATE_T__59_I_2.ZN0 DST GATE_T__59_I_4.A0 ;
NET GATE_T__61_N_1 SRC GATE_T__61_I_2.ZN0 DST GATE_T__61_I_4.A0 ;
NET GATE_T__63_N_1 SRC GATE_T__63_I_1.ZN0 DST GATE_T__63_U1.A0 ;
NET GATE_T__64_N_1 SRC GATE_T__64_I_1.ZN0 DST GATE_T__64_U1.A0 ;
NET GATE_T__65_N_3 SRC GATE_T__65_I_3.ZN0 DST GATE_T__65_I_4.A2 ;
NET GATE_T__65_N_2 SRC GATE_T__65_U3.ZN0 DST GATE_T__65_I_4.A1 ;
NET GATE_T__65_N_1 SRC GATE_T__65_I_2.ZN0 DST GATE_T__65_I_4.A0 ;
NET GATE_T__67_N_2 SRC GATE_T__67_U3.ZN0 DST GATE_T__67_I_4.A1 ;
NET GATE_T__67_N_1 SRC GATE_T__67_I_2.ZN0 DST GATE_T__67_I_4.A0 ;
NET GATE_T__69_N_2 SRC GATE_T__69_U3.ZN0 DST GATE_T__69_I_4.A1 ;
NET GATE_T__69_N_1 SRC GATE_T__69_I_2.ZN0 DST GATE_T__69_I_4.A0 ;
NET GATE_T__71_N_1 SRC GATE_T__71_I_2.ZN0 DST GATE_T__71_I_4.A0 ;
NET GATE_T__73_N_1 SRC GATE_T__73_I_1.ZN0 DST GATE_T__73_U1.A0 ;
NET GATE_T__74_N_1 SRC GATE_T__74_I_1.ZN0 DST GATE_T__74_U1.A0 ;
NET GATE_T__75_N_3 SRC GATE_T__75_I_3.ZN0 DST GATE_T__75_I_4.A2 ;
NET GATE_T__75_N_2 SRC GATE_T__75_U3.ZN0 DST GATE_T__75_I_4.A1 ;
NET GATE_T__75_N_1 SRC GATE_T__75_I_2.ZN0 DST GATE_T__75_I_4.A0 ;
NET GATE_T__77_N_2 SRC GATE_T__77_U3.ZN0 DST GATE_T__77_I_4.A1 ;
NET GATE_T__77_N_1 SRC GATE_T__77_I_2.ZN0 DST GATE_T__77_I_4.A0 ;
NET GATE_T__79_N_2 SRC GATE_T__79_U3.ZN0 DST GATE_T__79_I_4.A1 ;
NET GATE_T__79_N_1 SRC GATE_T__79_I_2.ZN0 DST GATE_T__79_I_4.A0 ;
NET GATE_T__81_N_1 SRC GATE_T__81_I_2.ZN0 DST GATE_T__81_I_4.A0 ;
NET GATE_T__83_N_1 SRC GATE_T__83_I_1.ZN0 DST GATE_T__83_U1.A0 ;
NET GATE_T__84_N_1 SRC GATE_T__84_I_1.ZN0 DST GATE_T__84_U1.A0 ;
NET GATE_T__85_N_2 SRC GATE_T__85_U3.ZN0 DST GATE_T__85_I_4.A1 ;
NET GATE_T__85_N_1 SRC GATE_T__85_I_2.ZN0 DST GATE_T__85_I_4.A0 ;
NET GATE_T__87_N_1 SRC GATE_T__87_I_2.ZN0 DST GATE_T__87_I_4.A0 ;
NET GATE_T__89_N_1 SRC GATE_T__89_I_1.ZN0 DST GATE_T__89_U1.A0 ;
NET GATE_T__90_N_1 SRC GATE_T__90_I_1.ZN0 DST GATE_T__90_U1.A0 ;
NET GATE_T__91_N_1 SRC GATE_T__91_I_2.ZN0 DST GATE_T__91_I_4.A0 ;
NET GATE_T__92_N_1 SRC GATE_T__92_I_1.ZN0 DST GATE_T__92_U1.A0 ;
NET GATE_T__93_N_1 SRC GATE_T__93_I_2.ZN0 DST GATE_T__93_I_4.A0 ;
NET GATE_T__94_N_1 SRC GATE_T__94_I_1.ZN0 DST GATE_T__94_U1.A0 ;
NET GATE_T__94_N_2 SRC GATE_T__94_I_2.ZN0 DST GATE_T__94_U1.A1 ;
NET GATE_T__95_N_1 SRC GATE_T__95_I_2.ZN0 DST GATE_T__95_I_4.A0 ;
NET GATE_T__96_N_1 SRC GATE_T__96_I_1.ZN0 DST GATE_T__96_U1.A0 ;
NET GATE_T__98_N_1 SRC GATE_T__98_I_1.ZN0 DST GATE_T__98_U1.A0 ;
NET GATE_T__100_N_2 SRC GATE_T__100_U3.ZN0 DST GATE_T__100_I_4.A1 ;
NET GATE_T__100_N_1 SRC GATE_T__100_I_2.ZN0 DST GATE_T__100_I_4.A0 ;
NET GATE_T__101_N_2 SRC GATE_T__101_U3.ZN0 DST GATE_T__101_U1.A1 ;
NET GATE_T__101_N_1 SRC GATE_T__101_U2.ZN0 DST GATE_T__101_U1.A0 ;
NET GATE_T__103_N_1 SRC GATE_T__103_I_1.ZN0 DST GATE_T__103_U1.A0 ;
NET GATE_T__104_N_2 SRC GATE_T__104_U3.ZN0 DST GATE_T__104_I_4.A1 ;
NET GATE_T__104_N_1 SRC GATE_T__104_I_2.ZN0 DST GATE_T__104_I_4.A0 ;
NET GATE_T__106_N_1 SRC GATE_T__106_I_2.ZN0 DST GATE_T__106_I_4.A0 ;
NET GATE_T__108_N_1 SRC GATE_T__108_U2.ZN0 DST GATE_T__108_U1.A0 ;
NET GATE_T__109_N_1 SRC GATE_T__109_I_1.ZN0 DST GATE_T__109_U1.A0 ;
NET GATE_T__111_N_2 SRC GATE_T__111_U3.ZN0 DST GATE_T__111_I_4.A1 ;
NET GATE_T__111_N_1 SRC GATE_T__111_I_2.ZN0 DST GATE_T__111_I_4.A0 ;
NET GATE_T__112_N_2 SRC GATE_T__112_U3.ZN0 DST GATE_T__112_I_4.A1 ;
NET GATE_T__112_N_1 SRC GATE_T__112_I_2.ZN0 DST GATE_T__112_I_4.A0 ;
NET GATE_T__113_N_1 SRC GATE_T__113_I_1.ZN0 DST GATE_T__113_U1.A0 ;
NET GATE_T__114_N_1 SRC GATE_T__114_I_2.ZN0 DST GATE_T__114_I_4.A0 ;
NET GATE_T__115_N_1 SRC GATE_T__115_I_2.ZN0 DST GATE_T__115_I_4.A0 ;
NET GATE_T__117_N_1 SRC GATE_T__117_I_1.ZN0 DST GATE_T__117_U1.A0 ;
NET GATE_T__118_N_1 SRC GATE_T__118_I_2.ZN0 DST GATE_T__118_I_4.A0 ;
NET GATE_T__119_N_1 SRC GATE_T__119_I_1.ZN0 DST GATE_T__119_U1.A0 ;
NET GATE_T__121_N_1 SRC GATE_T__121_I_1.ZN0 DST GATE_T__121_U1.A0 ;
NET GATE_T__122_N_1 SRC GATE_T__122_I_1.ZN0 DST GATE_T__122_U1.A0 ;
NET GATE_T__125_N_1 SRC GATE_T__125_I_1.ZN0 DST GATE_T__125_U1.A0 ;
NET GATE_T__126_N_1 SRC GATE_T__126_I_1.ZN0 DST GATE_T__126_U1.A0 ;
NET GATE_T__128_N_1 SRC GATE_T__128_I_2.ZN0 DST GATE_T__128_I_4.A0 ;
NET GATE_T__129_N_1 SRC GATE_T__129_I_1.ZN0 DST GATE_T__129_U1.A0 ;
NET GATE_T__131_N_1 SRC GATE_T__131_I_1.ZN0 DST GATE_T__131_U1.A0 ;
NET GATE_T__132_N_1 SRC GATE_T__132_I_1.ZN0 DST GATE_T__132_U1.A0 ;
NET GATE_T__135_N_1 SRC GATE_T__135_I_1.ZN0 DST GATE_T__135_U1.A0 ;
NET GATE_T__136_N_1 SRC GATE_T__136_I_1.ZN0 DST GATE_T__136_U1.A0 ;
NET GATE_T__138_N_1 SRC GATE_T__138_I_2.ZN0 DST GATE_T__138_I_4.A0 ;
NET GATE_T__139_N_1 SRC GATE_T__139_I_1.ZN0 DST GATE_T__139_U1.A0 ;
NET GATE_T__141_N_1 SRC GATE_T__141_I_1.ZN0 DST GATE_T__141_U1.A0 ;
NET GATE_T__142_N_1 SRC GATE_T__142_I_1.ZN0 DST GATE_T__142_U1.A0 ;
NET GATE_T__145_N_1 SRC GATE_T__145_I_1.ZN0 DST GATE_T__145_U1.A0 ;
NET GATE_T__146_N_1 SRC GATE_T__146_I_1.ZN0 DST GATE_T__146_U1.A0 ;
NET GATE_T__148_N_1 SRC GATE_T__148_I_1.ZN0 DST GATE_T__148_U1.A0 ;
NET GATE_T__152_N_1 SRC GATE_T__152_I_1.ZN0 DST GATE_T__152_U1.A0 ;
NET GATE_T__153_N_1 SRC GATE_T__153_I_1.ZN0 DST GATE_T__153_U1.A0 ;
NET GATE_T__156_N_1 SRC GATE_T__156_I_1.ZN0 DST GATE_T__156_U1.A0 ;
NET GATE_T__157_N_1 SRC GATE_T__157_I_1.ZN0 DST GATE_T__157_U1.A0 ;
NET IN_KEY_U1_Z0 SRC IN_KEY_U1_$1I45.Z0 DST GATE_I25_SS0_D_REG_U1.A0 GATE_T__47_I_3.A0 ;
NET IN_CLR_U1_Z0 SRC IN_CLR_U1_$1I45.Z0 DST GATE_N_27_AR_I_1.A0 GATE_N_27_C_I_1.A0 GATE_N_26_AR_I_1.A0 GATE_N_26_C_I_1.A0 GATE_N_25_AR_I_1.A0 GATE_N_25_C_I_1.A0 GATE_N_24_AR_I_1.A0 GATE_N_24_C_I_1.A0 GATE_N_34_AR_I_1.A0 GATE_N_34_C_I_1.A0 GATE_N_33_AR_I_1.A0 GATE_N_33_C_I_1.A0 GATE_N_32_AR_I_1.A0 GATE_N_32_C_I_1.A0 GATE_N_31_AR_I_1.A0 GATE_N_31_C_I_1.A0 GATE_N_20_AR_I_1.A0 GATE_N_20_C_I_1.A0 GATE_N_19_AR_I_1.A0 GATE_N_19_C_I_1.A0 GATE_N_18_AR_I_1.A0 GATE_N_18_C_I_1.A0 GATE_N_17_AR_I_1.A0 GATE_N_17_C_I_1.A0 GATE_N_16_AR_I_1.A0 GATE_N_16_C_I_1.A0 GATE_N_15_AR_I_1.A0 GATE_N_15_C_I_1.A0 GATE_N_14_AR_I_1.A0 GATE_N_14_C_I_1.A0 GATE_N_13_AR_I_1.A0 GATE_N_13_C_I_1.A0 ;
NET IN_CLK_U1_Z0 SRC IN_CLK_U1_$1I45.Z0 DST FF_N_36_U1.CD FF_N_36_U1.CLK FF_I26_Q1_U1.CD FF_I26_Q1_U1.CLK FF_I26_Q2_U1.CD FF_I26_Q2_U1.CLK FF_I26_Q3_U1.CD FF_I26_Q3_U1.CLK FF_I22_Q2_U1.CLK FF_I22_Q1_U1.CLK FF_I22_Q0_U1.CLK ;
NET OUT_dt_U1_XO0 EXT SRC OUT_dt_U1_$1I42.XO0 ;
NET OUT_g_U1_XO0 EXT SRC OUT_g_U1_$1I42.XO0 ;
NET OUT_f_U1_XO0 EXT SRC OUT_f_U1_$1I42.XO0 ;
NET OUT_e_U1_XO0 EXT SRC OUT_e_U1_$1I42.XO0 ;
NET OUT_d_U1_XO0 EXT SRC OUT_d_U1_$1I42.XO0 ;
NET OUT_c_U1_XO0 EXT SRC OUT_c_U1_$1I42.XO0 ;
NET OUT_b_U1_XO0 EXT SRC OUT_b_U1_$1I42.XO0 ;
NET OUT_a_U1_XO0 EXT SRC OUT_a_U1_$1I42.XO0 ;
NET OUT_SEG8_U1_XO0 EXT SRC OUT_SEG8_U1_$1I42.XO0 ;
NET OUT_SEG7_U1_XO0 EXT SRC OUT_SEG7_U1_$1I42.XO0 ;
NET OUT_SEG6_U1_XO0 EXT SRC OUT_SEG6_U1_$1I42.XO0 ;
NET OUT_SEG5_U1_XO0 EXT SRC OUT_SEG5_U1_$1I42.XO0 ;
NET OUT_SEG4_U1_XO0 EXT SRC OUT_SEG4_U1_$1I42.XO0 ;
NET OUT_SEG3_U1_XO0 EXT SRC OUT_SEG3_U1_$1I42.XO0 ;
NET OUT_SEG2_U1_XO0 EXT SRC OUT_SEG2_U1_$1I42.XO0 ;
NET OUT_SEG1_U1_XO0 EXT SRC OUT_SEG1_U1_$1I42.XO0 ;
SYM FD21 FF_N_13_U1 ;
PIN Q0 OUT N_13_Q_BLIF;
PIN CD IN N_13_AR;
PIN CLK IN N_13_C;
PIN D0 IN N_13_D_REG;
END;
SYM FD21 FF_N_14_U1 ;
PIN Q0 OUT N_14_Q_BLIF;
PIN CD IN N_14_AR;
PIN CLK IN N_14_C;
PIN D0 IN N_14_D_REG;
END;
SYM FD21 FF_N_15_U1 ;
PIN Q0 OUT N_15_Q_BLIF;
PIN CD IN N_15_AR;
PIN CLK IN N_15_C;
PIN D0 IN N_15_D_REG;
END;
SYM FD21 FF_N_16_U1 ;
PIN Q0 OUT N_16_Q_BLIF;
PIN CD IN N_16_AR;
PIN CLK IN N_16_C;
PIN D0 IN N_16_D_REG;
END;
SYM FD21 FF_N_17_U1 ;
PIN Q0 OUT N_17_Q_BLIF;
PIN CD IN N_17_AR;
PIN CLK IN N_17_C;
PIN D0 IN N_17_D_REG;
END;
SYM FD21 FF_N_18_U1 ;
PIN Q0 OUT N_18_Q_BLIF;
PIN CD IN N_18_AR;
PIN CLK IN N_18_C;
PIN D0 IN N_18_D_REG;
END;
SYM FD21 FF_N_19_U1 ;
PIN Q0 OUT N_19_Q_BLIF;
PIN CD IN N_19_AR;
PIN CLK IN N_19_C;
PIN D0 IN N_19_D_REG;
END;
SYM FD21 FF_N_20_U1 ;
PIN Q0 OUT N_20_Q_BLIF;
PIN CD IN N_20_AR;
PIN CLK IN N_20_C;
PIN D0 IN N_20_D_REG;
END;
SYM FD21 FF_N_21_U1 ;
PIN Q0 OUT N_21_Q_BLIF;
PIN CD IN N_36_Q_BLIF;
PIN CLK IN N_36_Q_BLIF;
PIN D0 IN N_21_D_REG;
END;
SYM FD21 FF_N_22_U1 ;
PIN Q0 OUT N_22_Q_BLIF;
PIN CD IN N_36_Q_BLIF;
PIN CLK IN N_36_Q_BLIF;
PIN D0 IN N_22_D_REG;
END;
SYM FD21 FF_N_23_U1 ;
PIN Q0 OUT N_23_Q_BLIF;
PIN CD IN N_36_Q_BLIF;
PIN CLK IN N_36_Q_BLIF;
PIN D0 IN N_23_D_REG;
END;
SYM FD21 FF_N_24_U1 ;
PIN Q0 OUT N_24_Q_BLIF;
PIN CD IN N_24_AR;
PIN CLK IN N_24_C;
PIN D0 IN N_24_D_REG;
END;
SYM FD21 FF_N_25_U1 ;
PIN Q0 OUT N_25_Q_BLIF;
PIN CD IN N_25_AR;
PIN CLK IN N_25_C;
PIN D0 IN N_25_D_REG;
END;
SYM FD21 FF_N_26_U1 ;
PIN Q0 OUT N_26_Q_BLIF;
PIN CD IN N_26_AR;
PIN CLK IN N_26_C;
PIN D0 IN N_26_D_REG;
END;
SYM FD21 FF_N_27_U1 ;
PIN Q0 OUT N_27_Q_BLIF;
PIN CD IN N_27_AR;
PIN CLK IN N_27_C;
PIN D0 IN N_27_D_REG;
END;
SYM FD21 FF_N_28_U1 ;
PIN Q0 OUT N_28_Q_BLIF;
PIN CD IN N_36_Q_BLIF;
PIN CLK IN N_36_Q_BLIF;
PIN D0 IN N_28_D_REG;
END;
SYM FD21 FF_N_29_U1 ;
PIN Q0 OUT N_29_Q_BLIF;
PIN CD IN N_36_Q_BLIF;
PIN CLK IN N_36_Q_BLIF;
PIN D0 IN N_29_D_REG;
END;
SYM FD21 FF_N_30_U1 ;
PIN Q0 OUT N_30_Q_BLIF;
PIN CD IN N_36_Q_BLIF;
PIN CLK IN N_36_Q_BLIF;
PIN D0 IN N_30_D_REG;
END;
SYM FD21 FF_N_31_U1 ;
PIN Q0 OUT N_31_Q_BLIF;
PIN CD IN N_31_AR;
PIN CLK IN N_31_C;
PIN D0 IN N_31_D_REG;
END;
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