lattice.prj

VHDL实例,适合大家学习使用

[PROJECT_INFORMATION]
Version=5.2
Project_Name=EDA
Project_Directory=D:\mywenjian\eda
SW_VERSION=8.4

[SOURCE_INFORMATION]
Design_Directory=D:\mywenjian\eda\pb
Design_File=pb.edf
Design_Type=EDF
Parameter_File=D:\mywenjian\eda\pb\pb.prp
Design_Modified=1014781084
Design=pbch
Parameter_FileTime=1014783584

[DATABASE_INFORMATION]
Database_File=pb.LDB

[SETTING_INFORMATION]
Settings_File=pb.stp
Last Setting=

[EDIF Setting]
VCC=
GND=
Property_File=D:\mywenjian\eda\pb\pb.prp
EDIF reader Vendor change=0
EDIF reader Vendor=
EDIF writer Vendor=
Psnttn=0
LPMAttr=0
Cell Prefix=
Load Default Setting=1
Ground floating Output pins=1
Async Clear=0
Async Preset=0
Map Clock Enable=0
Array Index Ordering=
Least Significant Bit=
Extension=edo

[PROJECT_NEW_UPDATE]
PART=ispLSI1032E-70LJ84

[Extended UI]
Option=